-
1.发明授权公开(公告)号：US09485874B2
公开(公告)日：2016-11-01
申请号：US14010250
申请日：2013-08-26
Inventor： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong Hsieh
IPC: H05K1/11 , H05K3/40 , H01L23/14 , H01L23/498
CPC classification number: H05K3/4038 , H01L23/147 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2924/15311 , H05K1/115 , Y10T29/49165
Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate may include an interposer having at least one conductive through via, a photo-sensitive dielectric layer formed on one side of the interposer, and at least one conductive via formed in the photo-sensitive dielectric layer and electrically connected to the conductive through via. By means of a photo lithography process with high alignment accuracy, at least one via with an extremely small diameter can be formed on the photo-sensitive dielectric layer and align with the conductive through via. Therefore, the conductive through via can have its diameter reduced as required, without considering the alignment with the at least one via. Accordingly, the interconnection density of the conductive through via on the interposer is increased.
Abstract translation: 提供封装基板和制造封装基板的方法。 封装衬底可以包括具有至少一个导电通孔，形成在插入器的一侧上的光敏电介质层和至少一个形成在光敏电介质层中的导电通孔并且与导电通孔 通过。 通过具有高对准精度的光刻工艺，可以在感光介电层上形成至少一个具有极小直径的通孔，并与导电通孔对齐。 因此，导电通孔可以根据需要减小其直径，而不考虑与至少一个通孔的对准。 因此，插入件上的导电贯通孔的互连密度增加。
-
公开(公告)号：US11791256B2
公开(公告)日：2023-10-17
申请号：US17095742
申请日：2020-11-12
Inventor： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong Hsieh
IPC: H01L29/00 , H01L23/522 , H01L23/498 , H01L21/48 , H01L25/04
CPC classification number: H01L23/5226 , H01L21/4857 , H01L23/49822 , H01L23/49833 , H01L23/49838 , H01L25/04 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
Abstract: A package substrate includes a substrate, an interposer and an insulating protective layer. The substrate has a first surface and a second surface opposing to the first surface. The first surface includes a plurality of first conductive pads. The interposer is disposed on the first surface of the substrate such that the first conductive pads are partially covered by the interposer. The interposer includes a plurality of penetrating conductive vias electrically connected to the substrate. The insulating protective layer is disposed on the first surface of the substrate and surrounding the interposer. The insulating protective layer includes at least one penetrating conductive column, wherein a first width of the respective penetrating conductive column is greater than a second width of each of the penetrating conductive vias of the interposer.
-
公开(公告)号：US11355472B2
公开(公告)日：2022-06-07
申请号：US16264689
申请日：2019-02-01
Applicant: Industrial Technology Research Institute
Inventor： Yu-Min Lin , Tao-Chih Chang , Wei-Chung Lo
IPC: H01L23/00 , H01L27/146
Abstract: A package structure and a method for connecting components are provided, in which the package includes a first substrate including a first wiring and at least one first contact connecting to the first wiring; a second substrate including a second wiring and at least one second contact connecting to the second wiring, the at least one first contact and the at least one second contact partially physically contacting with each other or partially chemically interface reactive contacting with each other; and at least one third contact surrounding the at least one first contact and the at least one second contact. The first substrate and the second substrate are electrically connected with each other at least through the at least one first contact and the at least one second contact.
-
公开(公告)号：US20210066189A1
公开(公告)日：2021-03-04
申请号：US17095742
申请日：2020-11-12
Inventor： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong HSIEH
IPC: H01L23/522 , H01L23/498 , H01L21/48 , H01L25/04
Abstract: A package substrate includes a substrate, an interposer and an insulating protective layer. The substrate has a first surface and a second surface opposing to the first surface. The first surface includes a plurality of first conductive pads. The interposer is disposed on the first surface of the substrate such that the first conductive pads are partially covered by the interposer. The interposer includes a plurality of penetrating conductive vias electrically connected to the substrate. The insulating protective layer is disposed on the first surface of the substrate and surrounding the interposer. The insulating protective layer includes at least one penetrating conductive column, wherein a first width of the respective penetrating conductive column is greater than a second width of each of the penetrating conductive vias of the interposer.
-
公开(公告)号：US11854961B2
公开(公告)日：2023-12-26
申请号：US17095744
申请日：2020-11-12
Inventor： Yu-Hua Chen , Wei-Chung Lo , Tao-Chih Chang , Yu-Min Lin , Sheng-Tsai Wu
IPC: H01L29/00 , H01L23/522 , H01L23/498 , H01L25/04 , H01L21/48
CPC classification number: H01L23/5226 , H01L21/4857 , H01L23/49822 , H01L23/49833 , H01L23/49838 , H01L25/04 , H01L2924/0002
Abstract: A package substrate includes a substrate, an insulating protective layer and an interposer. The substrate has a first surface and a second surface opposing to the first surface. The substrate includes a plurality of first conductive pads embedded in the first surface. The insulating protective layer is disposed on the first surface of the substrate. The insulating protective layer has an opening for exposing the first conductive pads embedded in the first surface of the substrate. The interposer has a top surface and a bottom surface opposing to the top surface. The interposer includes a plurality of conductive vias and a plurality of second conductive pads located on the bottom surface. The interposer is located in a recess defined by the opening of the insulating protective layer and the first surface of the substrate. Each of the second conductive pads is electrically connected to corresponding first conductive pad.
-
Patent Agency Ranking
公开(公告)号：US11004816B2
公开(公告)日：2021-05-11
申请号：US16553179
申请日：2019-08-28
Applicant: Industrial Technology Research Institute
Inventor： Yu-Min Lin , Ang-Ying Lin , Sheng-Tsai Wu , Tao-Chih Chang , Wei-Chung Lo
IPC: H01L23/544 , H01L23/00 , H01L21/78 , H01L23/31
Abstract: A hetero-integrated structure includes a substrate, a die, a passivation layer, a first redistribution layer, a second redistribution layer, and connecting portions. The die is attached on the substrate. The die has an active surface and a non-active surface. The active surface has pads. The passivation layer covers sidewalls and a surface of the die to expose a surface of the pads. The first redistribution layer is located on the passivation layer and electrically connected to the pads. The second redistribution layer is located on the substrate and adjacent to the die. The connecting portions are connected to the first redistribution layer and the second redistribution layer.
-
公开(公告)号：US10068847B2
公开(公告)日：2018-09-04
申请号：US15468087
申请日：2017-03-23
Inventor： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong Hsieh
IPC: H01L29/00 , H01L23/522 , H01L23/498 , H01L21/48 , H01L25/04
Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a first surface including a plurality of conductive pads and a second surface; an insulating protective layer formed on the first surface of the substrate; an interposer embedded in and exposed from the insulating protective layer; and at least a passive component provided on the first surface of the substrate. The insulating protective layer includes at least an opening for exposing at least one of the conductive pads, and the at least the passive component is directly provided on the conductive pad exposed from the opening.
-
公开(公告)号：US20200075519A1
公开(公告)日：2020-03-05
申请号：US16553179
申请日：2019-08-28
Applicant: Industrial Technology Research Institute
Inventor： Yu-Min Lin , Ang-Ying Lin , Sheng-Tsai Wu , Tao-Chih Chang , Wei-Chung Lo
Abstract: A hetero-integrated structure includes a substrate, a die, a passivation layer, a first redistribution layer, a second redistribution layer, and connecting portions. The die is attached on the substrate. The die has an active surface and a non-active surface. The active surface has pads. The passivation layer covers sidewalls and a surface of the die to expose a surface of the pads. The first redistribution layer is located on the passivation layer and electrically connected to the pads. The second redistribution layer is located on the substrate and adjacent to the die. The connecting portions are connected to the first redistribution layer and the second redistribution layer.
-
公开(公告)号：US20190252345A1
公开(公告)日：2019-08-15
申请号：US16264689
申请日：2019-02-01
Applicant: Industrial Technology Research Institute
Inventor： Yu-Min Lin , Tao-Chih Chang , Wei-Chung Lo
IPC: H01L23/00 , H01L27/146
CPC classification number: H01L24/81 , H01L24/13 , H01L24/16 , H01L24/73 , H01L27/14636 , H01L2224/13017 , H01L2224/13147 , H01L2224/1357 , H01L2224/13609 , H01L2224/13611 , H01L2224/13613 , H01L2224/13639 , H01L2224/13647 , H01L2224/16014 , H01L2224/16145 , H01L2224/16147 , H01L2224/16227 , H01L2224/16237 , H01L2224/16503 , H01L2224/73204 , H01L2224/81203 , H01L2224/8181 , H01L2224/8192 , H01L2224/81951 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106
Abstract: A package structure and a method for connecting components are provided, in which the package includes a first substrate including a first wiring and at least one first contact connecting to the first wiring; a second substrate including a second wiring and at least one second contact connecting to the second wiring, the at least one first contact and the at least one second contact partially physically contacting with each other or partially chemically interface reactive contacting with each other; and at least one third contact surrounding the at least one first contact and the at least one second contact. The first substrate and the second substrate are electrically connected with each other at least through the at least one first contact and the at least one second contact.
-
公开(公告)号：US20170194249A1
公开(公告)日：2017-07-06
申请号：US15468087
申请日：2017-03-23
Inventor： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong Hsieh
IPC: H01L23/522 , H01L21/48 , H01L25/04 , H01L23/498
CPC classification number: H01L23/5226 , H01L21/4857 , H01L23/49822 , H01L23/49833 , H01L23/49838 , H01L25/04 , H01L2924/0002 , H01L2924/00
Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a first surface including a plurality of conductive pads and a second surface; an insulating protective layer formed on the first surface of the substrate; an interposer embedded in and exposed from the insulating protective layer; and at least a passive component provided on the first surface of the substrate. The insulating protective layer includes at least an opening for exposing at least one of the conductive pads, and the at least the passive component is directly provided on the conductive pad exposed from the opening.
-
-
-
-
-
-
-
-
-
Search Results
17
records
(took 0.017 seconds)
