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    Method and device to operate a power switch in multiple modes
    1.
    发明授权
    Method and device to operate a power switch in multiple modes 有权

    公开(公告)号：US10855183B1

    公开(公告)日：2020-12-01

    申请号：US16521113

    申请日：2019-07-24

    Applicant: Infineon Technologies AG

    Inventor： Jens Barrenscheen ,  Benno Koeppl

    IPC: H02M3/158 ,  H02M7/797 ,  H02M5/293 ,  G05F1/573 ,  H03K17/082

    Abstract: Methods and circuits are provided for controlling an electronic switch such that it may be controlled by an external control signal, such as a PWM signal, or be set to operate in an active-diode mode, wherein current is allowed to flow through the switch in only one direction. The described circuits are configured to autonomously control the electronic switch, such that no external control signal is required when the active-diode mode is used. The provided techniques allow electronic switches to be efficiently used as part of a power stage or part of an active rectifier, so as to support bi-directional switched-mode power supplies, motor/generator drivers, and related electric circuits that require bi-directional power flow. By reusing electronic switches thusly and implementing an active-diode mode, the circuitry is minimized while maintaining good power efficiency.

    CIRCUIT ARRANGEMENT
    2.
    发明申请
    CIRCUIT ARRANGEMENT 审中-公开
    电路布置

    公开(公告)号：US20150010041A1

    公开(公告)日：2015-01-08

    申请号：US14470951

    申请日：2014-08-28

    Applicant: Infineon Technologies AG

    Inventor： Benno Koeppl ,  Frank Auer ,  Andreas Kiep

    IPC: G01R31/26 ,  G01K7/01

    CPC classification number: G01R31/2628 ,  G01K7/01 ,  G01K2217/00 ,  G01R21/02 ,  G01R31/025 ,  G01R31/42 ,  H02M1/32 ,  H02M7/5387

    Abstract: According to various embodiments, a circuit arrangement is provided which includes a bridge circuit having at least two field effect transistors and a measurement circuit configured to measure a forward voltage of a body diode of any one of the at least two field effect transistors resulting from a current flowing through the field effect transistor.

    Abstract translation: 根据各种实施例，提供了一种电路装置，其包括具有至少两个场效应晶体管的桥接电路和被配置为测量至少两个场效应晶体管中任一个的体二极管的正向电压的测量电路， 流经场效应晶体管的电流。

    Bidirectional communication using edge timing in a signal
    4.
    发明授权
    Bidirectional communication using edge timing in a signal 有权

    公开(公告)号：US10855527B2

    公开(公告)日：2020-12-01

    申请号：US15943985

    申请日：2018-04-03

    Applicant: Infineon Technologies AG

    Inventor： Jens Barrenscheen ,  Reza Fotouhi ,  Benno Koeppl

    IPC: H04L12/24 ,  H04L5/00 ,  H04L7/00 ,  H04L25/49 ,  H04W84/20

    Abstract: Systems, methods, and circuitries are provided to perform bidirectional communication using edge timing in a common signal. In one example, a method includes receiving a common signal on a signal line between a device and another device. The common signal includes a series of signal periods, and each signal period includes a first edge of a first type and a second edge of a second type different from the first type. In each signal period of the series of signal periods: information being communicated by the other device is determined based at least on the determined timing of the first edge and a timing for a subsequent second edge with respect to the signal period is determined based on information to be communicated to the other device. The subsequent second edge is generated at the selected timing in a subsequent signal period of the series of signal periods.

    System and method for analog to digital conversion
    5.
    发明授权
    System and method for analog to digital conversion 有权

    公开(公告)号：US09742430B1

    公开(公告)日：2017-08-22

    申请号：US15242265

    申请日：2016-08-19

    Applicant: Infineon Technologies AG

    Inventor： Jens Barrenscheen ,  Matthias Bogus ,  Benno Koeppl

    IPC: H03M3/00 ,  H03M1/12

    CPC classification number: H03M3/462

    Abstract: In some embodiments, a method of operating a sigma-delta analog-to-digital converter (ADC) includes converting an analog input signal into a sequence of digital data using a sigma-delta modulator of the sigma-delta ADC, setting a first configuration for a decimation filter of the sigma-delta ADC according to a first condition of a measurement window, filtering the sequence of digital data using a low-pass filter (LPF) of the decimation filter, and in response to a change in the measurement window, setting a second configuration for the decimation filter according to a second condition of the measurement window.

    System and method of monitoring a switched-mode power supply
    6.
    发明授权
    System and method of monitoring a switched-mode power supply 有权

    公开(公告)号：US10917012B1

    公开(公告)日：2021-02-09

    申请号：US16593157

    申请日：2019-10-04

    Applicant: Infineon Technologies AG

    Inventor： Christian Heiling ,  Jens Barrenscheen ,  Matthias Bogus ,  Benno Koeppl ,  Markus Zannoth

    IPC: H02P27/08 ,  H02M3/158 ,  H02M1/08

    Abstract: In accordance with an embodiment, a method includes driving a predetermined load using a driver circuit according to a drive pattern; supplying power to the driver circuit using a switched-mode power supply (SMPS) configured to be coupled to at least one external component; and verifying functionality of the SMPS while driving the predetermined load. Verifying the functionality includes monitoring at least one operating parameter of the SMPS, where the at least one operating parameter of the SMPS is dependent on the drive pattern and the at least one external component, comparing the at least one operating parameter to at least one expected operating parameter to form a first comparison result, and indicating an error condition based on the first comparison result.

    Circuit and method for de-energizing a field coil
    7.
    发明授权
    Circuit and method for de-energizing a field coil 有权
    用于断电励磁线圈的电路和方法

    公开(公告)号：US08749206B2

    公开(公告)日：2014-06-10

    申请号：US13939045

    申请日：2013-07-10

    Applicant: Infineon Technologies AG

    Inventor： Benno Koeppl ,  Michael Scheffer ,  Frank Auer

    IPC: H02P9/10

    CPC classification number: H02P9/02 ,  H02P9/102

    Abstract: A circuit includes a first half bridge including a first controllable semiconductor switch and a first diode. The first controllable semiconductor switch is coupled between a first constant supply potential and a center tap of the first half bridge. The first diode is coupled between the center tap and a constant reference potential. A second half bridge includes a second diode and a second controllable semiconductor switch. The second diode is coupled between a second constant potential higher than the first potential and a center tap of the second half bridge. The second controllable semiconductor switch is coupled between the center tap and the constant reference potential. Driver circuitry controls the conducting state of the first and the second semiconductor switch thus controlling the current flow through a field connectable between the center taps.

    Abstract translation: 电路包括包括第一可控半导体开关和第一二极管的第一半桥。 第一可控半导体开关耦合在第一半桥的第一恒定电源电位和中心抽头之间。 第一个二极管耦合在中心抽头和恒定的参考电位之间。 第二半桥包括第二二极管和第二可控半​​导体开关。 第二二极管耦合在高于第一电位的第二恒定电位和第二半桥的中心抽头之间。 第二可控半​​导体开关耦合在中心抽头和恒定参考电位之间。 驱动器电路控制第一和第二半导体开关的导通状态，从而控制通过中心抽头之间可连接的场的电流。

    System and method of monitoring a switching transistor
    10.
    发明授权
    System and method of monitoring a switching transistor 有权

    公开(公告)号：US10895601B2

    公开(公告)日：2021-01-19

    申请号：US16409131

    申请日：2019-05-10

    Applicant: Infineon Technologies AG

    Inventor： Matthias Bogus ,  Jens Barrenscheen ,  Christian Heiling ,  Benno Koeppl ,  Markus Zannoth

    IPC: H02P27/08 ,  H02H7/08 ,  G01R31/327 ,  H03K17/082 ,  G01R31/26

    Abstract: In accordance with an embodiment, a method includes using a monitoring circuit disposed on a monolithic integrated circuit to monitor an output signal of a first switching transistor for a first output edge transition at a monitoring terminal of the monolithic integrated circuit; using a time measuring circuit disposed on the monolithic integrated circuit to measure a first time delay between a first input edge transition of a first drive signal and the first output edge transition, where the first drive signal is configured to cause a change of state of the first switching transistor; using an analysis circuit disposed on the monolithic integrated circuit to compare the measured first time delay with a first predetermined threshold to form a first comparison result; and indicating a first error condition based on the first comparison result.

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