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    Encoded driver chip for light emitting pixel array
    1.
    发明授权
    Encoded driver chip for light emitting pixel array 有权

    公开(公告)号：US11043622B2

    公开(公告)日：2021-06-22

    申请号：US16552893

    申请日：2019-08-27

    Applicant: Infineon Technologies AG

    Inventor： Dietrich Bonart

    IPC: H01L33/62 ,  H01L25/16 ,  G09G3/32

    Abstract: A semiconductor chip includes: a semiconductor substrate having driver circuitry configured to drive an array of electronic devices; a metal layer above the semiconductor substrate, the metal layer having an array of contacts electrically connected to the driver circuitry and configured to provide an electrical connection between the semiconductor chip and the array of electronic devices; and a plurality of structures formed in the metal layer and/or in a layer between the metal layer and the semiconductor substrate, the plurality of structures being visually unobstructed at a side of the metal layer which faces away from the semiconductor substrate. Each structure of the plurality of structures is physically encoded with a pattern that corresponds to a location of an individual pair of contacts within the array of contacts or a location of a group of adjacent pairs of contacts within the array of contacts.

    Electrically-Verifiable Fuses and Method of Fuse Verification
    3.
    发明申请
    Electrically-Verifiable Fuses and Method of Fuse Verification 审中-公开

    公开(公告)号：US20190113562A1

    公开(公告)日：2019-04-18

    申请号：US15785773

    申请日：2017-10-17

    Applicant: Infineon Technologies AG

    Inventor： Dietrich Bonart ,  Thomas Gross ,  Franziska Haering

    IPC: G01R31/26 ,  H01L21/66 ,  H01L23/525 ,  G01R31/07

    Abstract: A semiconductor wafer includes a semiconductor substrate having a plurality of die areas separated from one another by dicing areas. Each die area includes one or more metal layers above the semiconductor substrate and a plurality of fuse structures formed in at least one of the one or more metal layers. Each fuse structure includes a fuse area between first and second fuse heads. Each die area also includes a first pair of contacts connected to different areas of the first fuse head of at least some of the fuse structures. The wafer can be singulated along the dicing areas into individual dies. A corresponding method of fuse verification is also provided.

    Semiconductor chip and method of processing a semiconductor chip
    4.
    发明授权
    Semiconductor chip and method of processing a semiconductor chip 有权

    公开(公告)号：US10134697B2

    公开(公告)日：2018-11-20

    申请号：US14995028

    申请日：2016-01-13

    Applicant: Infineon Technologies AG

    Inventor： Dietrich Bonart ,  Ludger Borucki ,  Martina Debie ,  Bernhard Weidgans

    IPC: H01L23/00

    Abstract: Various embodiments provide a semiconductor chip, wherein the semiconductor chip comprises a first contact area and a second contact area both formed at a frontside of the semiconductor chip; a passivation layer arranged at the frontside between the first contact area and the second contact area; and a contact stack formed over the frontside of the semiconductor chip and comprising a plurality of layers, wherein at least one layer of the plurality of layers is removed from the passivation layer and boundary regions of the contact areas being adjacent to the passivation layer and wherein at least one another layer of the plurality of different layer is present in the boundary region of the contact areas adjoining the passivation layer.

    METHOD FOR PROCESSING A SEMICONDUCTOR WORKPIECE
    5.
    发明申请
    METHOD FOR PROCESSING A SEMICONDUCTOR WORKPIECE 有权
    加工半导体工件的方法

    公开(公告)号：US20140357055A1

    公开(公告)日：2014-12-04

    申请号：US13903013

    申请日：2013-05-28

    Applicant: Infineon Technologies AG

    Inventor： Anja Gissibl ,  Hermann Wendt ,  Thomas Fischer ,  Bernhard Weidgans ,  Gudrun Stranzl ,  Tobias Schmidt ,  Dietrich Bonart

    IPC: H01L21/306 ,  H01L21/78 ,  H01L21/3065

    CPC classification number: H01L21/78 ,  H01L21/28568 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/32133 ,  H01L21/32134 ,  H01L21/76841 ,  H01L21/76892

    Abstract: A method for processing a semiconductor workpiece is provided, which may include: providing a semiconductor workpiece including a metallization layer stack disposed at a side of the semiconductor workpiece, the metallization layer stack including at least a first layer and a second layer disposed over the first layer, wherein the first layer contains a first material and the second layer contains a second material that is different from the first material; patterning the metallization layer stack, wherein patterning the metallization layer stack includes wet etching the first layer and the second layer by means of an etching solution that has at least substantially the same etching rate for the first material and the second material.

    Abstract translation: 提供了一种用于处理半导体工件的方法，其可以包括：提供包括设置在半导体工件侧面的金属化层堆叠的半导体工件，金属化层堆叠包括至少第一层和设置在第一层上的第二层 层，其中所述第一层包含第一材料，并且所述第二层包含不同于所述第一材料的第二材料; 图案化金属化层堆叠，其中图案化金属化层堆叠包括通过蚀刻溶液湿法蚀刻第一层和第二层，蚀刻溶液对于第一材料和第二材料具有至少基本上相同的蚀刻速率。

    MULTI-PIXEL LED ARRANGEMENTS
    7.
    发明公开
    MULTI-PIXEL LED ARRANGEMENTS 审中-公开

    公开(公告)号：US20240127739A1

    公开(公告)日：2024-04-18

    申请号：US18046115

    申请日：2022-10-12

    Applicant: Infineon Technologies AG

    Inventor： Dietrich Bonart

    IPC: G09G3/32 ,  H01L25/075 ,  H01L33/62

    CPC classification number: G09G3/32 ,  H01L25/0753 ,  H01L33/62 ,  G09G2320/0233

    Abstract: A system may include a set of light-emitting diode (LED) circuits, wherein each LED circuit of the set of LED circuits comprises: a first electrode; a set of second electrodes; and a set of pixels, wherein each pixel of the set of pixels corresponds to a combination of the first electrode and a respective second electrode of the set of second electrodes. A plurality of pixels may include the set of pixels corresponding to each LED circuit of the set of LED circuits. The first electrode may be located within a center portion of the respective LED circuit, and each second electrode of the set of second electrodes may be located within an outer portion the respective LED circuit. The system also includes a controller circuit configured to control whether each pixel of the plurality of pixels is activated or deactivated.

    Multi-pixel LED arrangements
    8.
    发明授权
    Multi-pixel LED arrangements 有权

    公开(公告)号：US11955064B1

    公开(公告)日：2024-04-09

    申请号：US18046115

    申请日：2022-10-12

    Applicant: Infineon Technologies AG

    Inventor： Dietrich Bonart

    IPC: H01L25/16 ,  G09G3/32 ,  H01L25/075 ,  H01L27/15 ,  H01L33/62

    CPC classification number: G09G3/32 ,  H01L25/0753 ,  H01L25/167 ,  H01L27/156 ,  H01L33/62 ,  G09G2320/0233

    Abstract: A system may include a set of light-emitting diode (LED) circuits, wherein each LED circuit of the set of LED circuits comprises: a first electrode; a set of second electrodes; and a set of pixels, wherein each pixel of the set of pixels corresponds to a combination of the first electrode and a respective second electrode of the set of second electrodes. A plurality of pixels may include the set of pixels corresponding to each LED circuit of the set of LED circuits. The first electrode may be located within a center portion of the respective LED circuit, and each second electrode of the set of second electrodes may be located within an outer portion the respective LED circuit. The system also includes a controller circuit configured to control whether each pixel of the plurality of pixels is activated or deactivated.

    OPTOELECTRONIC ASSEMBLY
    9.
    发明公开
    OPTOELECTRONIC ASSEMBLY 审中-公开

    公开(公告)号：US20230178696A1

    公开(公告)日：2023-06-08

    申请号：US17540373

    申请日：2021-12-02

    Applicant: Infineon Technologies AG

    Inventor： Dietrich Bonart ,  Alexander Heinrich ,  Bernhard Weidgans

    IPC: H01L33/62 ,  H01L25/075

    CPC classification number: H01L33/62 ,  H01L25/0753

    Abstract: An optoelectronic assembly includes: a plurality of semiconductor light sources, each one of the semiconductor light sources including a plurality of pads; and a driver device configured to drive each one of the semiconductor light sources. For each pad of each semiconductor light source, the driver device has a corresponding pad facing the pad of the semiconductor light source to form a pair of connectable pads. For each pair of connectable pads, a first pad of the pair of connectable pads has a first shape and a second pad of the pair of connectable pads has a second shape complementary to the first shape such that the first pad and the second pad form a mated connection when brought into contact with one another. Corresponding driver device and semiconductor light sources are also described.

    Encoded Driver Chip for Light Emitting Pixel Array
    10.
    发明申请
    Encoded Driver Chip for Light Emitting Pixel Array 有权

    公开(公告)号：US20210066558A1

    公开(公告)日：2021-03-04

    申请号：US16552893

    申请日：2019-08-27

    Applicant: Infineon Technologies AG

    Inventor： Dietrich Bonart

    IPC: H01L33/62 ,  G09G3/32 ,  H01L25/16

    Abstract: A semiconductor chip includes: a semiconductor substrate having driver circuitry configured to drive an array of electronic devices; a metal layer above the semiconductor substrate, the metal layer having an array of contacts electrically connected to the driver circuitry and configured to provide an electrical connection between the semiconductor chip and the array of electronic devices; and a plurality of structures formed in the metal layer and/or in a layer between the metal layer and the semiconductor substrate, the plurality of structures being visually unobstructed at a side of the metal layer which faces away from the semiconductor substrate. Each structure of the plurality of structures is physically encoded with a pattern that corresponds to a location of an individual pair of contacts within the array of contacts or a location of a group of adjacent pairs of contacts within the array of contacts.

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