公开(公告)号：US20210296040A1

公开(公告)日：2021-09-23

申请号：US16329309

申请日：2016-09-30

Applicant: INTEL CORPORATION

Inventor： KAAN OGUZ ,  KEVIN P. O'BRIEN ,  BRIAN S. DOYLE ,  CHARLES C. KUO ,  MARK L. DOCZY

IPC: H01F10/32 ,  G11C11/16 ,  H01L43/10 ,  H01L43/08 ,  H01L43/02 ,  H01L43/12

Abstract: A perpendicular spin transfer torque memory (pSTTM) device incorporates a magnetic tunnel junction (MTJ) device having a free magnetic stack that includes a plurality of magnetic layers interleaved with a plurality of non-magnetic insert layers. The layers are arranged such that the topmost and bottommost layers are magnetic layers. The stacked design decreases the damping of the MTJ free magnetic stack, beneficially reducing the write current required to write to the pSTTM device. The stacked design further increases the interface anisotropy, thereby beneficially improving the stability of the pSTTM device. The non-magnetic interface layer may include tantalum, molybdenum, tungsten, hafnium, or iridium, or a binary alloy containing at least two of tantalum, molybdenum, tungsten hafnium, or iridium.

公开(公告)号：US20180240969A1

公开(公告)日：2018-08-23

申请号：US15753478

申请日：2015-09-18

Applicant: INTEL CORPORATION

Inventor： MARK L. DOCZY ,  BRIAN S. DOYLE ,  CHARLES C. KUO ,  KAAN OGUZ ,  KEVIN P. O'BRIEN ,  SATYARTH SURI ,  TEJASWI K. INDUKURI

IPC: H01L43/12 ,  H01L27/22 ,  H01L43/08 ,  H01L43/10

CPC classification number: H01L43/12 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: Technologies for manufacturing spin transfer torque memory (STTM) elements are disclosed. In some embodiments, the technologies include methods for interrupting the electrical continuity of a re-deposited layer that may form on one or more sidewalls of an STTM element during its formation. Devices and systems including such STTM elements are also described.

公开(公告)号：US20190386014A1

公开(公告)日：2019-12-19

申请号：US16465044

申请日：2016-12-29

Applicant: INTEL CORPORATION

Inventor： BRIAN S. DOYLE ,  KAAN OGUZ ,  RICKY J. TSENG ,  KEVIN P. O'BRIEN

IPC: H01L27/1159 ,  G11C5/06 ,  H01L29/78 ,  H01L29/66

Abstract: Techniques are disclosed for forming integrated circuit (IC) devices that include ferroelectric field-effect transistors (FE-FETs) having a top gate and a bottom gate (or, generally, a dual-gate configuration). The disclosed FE-FET devices may be formed in the back end of the IC structure and may be implemented with various materials that exhibit ferroelectric properties when processed at temperatures within the thermal budget of the back-end processing. The disclosed back-end FE-FET devices can achieve greater than two resistance states, depending on the direction of poling of the top and bottom gates, thereby enabling the formation of 3-state and 4-state memory devices, for example. Additionally, as will be appreciated in light of this disclosure, the disclosed back-end FE-FET devices can free up floor space in the front-end, thereby providing space for additional devices in the front-end.

公开(公告)号：US20190049514A1

公开(公告)日：2019-02-14

申请号：US16073688

申请日：2016-04-01

Applicant: INTEL CORPORATION

Inventor： KEVIN P. O'BRIEN ,  KAAN OGUZ ,  CHRISTOPHER J. WIEGAND ,  MARK L. DOCZY ,  BRIAN S. DOYLE ,  MD TOFIZUR RAHMAN ,  OLEG GOLONZKA ,  TAHIR GHANI

IPC: G01R31/28 ,  G01R31/315 ,  H01L21/66 ,  G01R33/09 ,  H01L43/12

CPC classification number: G01R31/2831 ,  G01N24/10 ,  G01R31/315 ,  G01R33/098 ,  G01R33/60 ,  G01R35/00 ,  H01L22/14 ,  H01L43/12

Abstract: Techniques are disclosed for carrying out ferromagnetic resonance (FMR) testing on whole wafers populated with one or more buried magnetic layers. The techniques can be used to verify or troubleshoot processes for forming the buried magnetic layers, without requiring the wafer to be broken. The techniques can also be used to distinguish one magnetic layer from others in the same stack, based on a unique frequency response of that layer. One example methodology includes moving a wafer proximate to a waveguide (within 500 microns, but without shorting), energizing a DC magnetic field near the target measurement point, applying an RF input signal through the waveguide, collecting resonance spectra of the frequency response of the waveguide, and decomposing the resonance spectra into magnetic properties of the target layer. One or both of the DC magnetic field and RF input signal can be swept to generate a robust set of resonance spectra.