公开(公告)号：US09998125B2

公开(公告)日：2018-06-12

申请号：US15025226

申请日：2013-11-19

Applicant: Intel Corporation

Inventor： Ganesh Balamurugan ,  Mozhgan Mansuri ,  Sami Hyvonen ,  Bryan K. Casper ,  Frank O'Mahony

IPC: H03L7/00 ,  G11C7/22 ,  H03K5/156 ,  H04L25/03 ,  H04B1/04 ,  G11C7/10

CPC classification number: H03L7/00 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/22 ,  G11C7/222 ,  H03K5/1565 ,  H03L7/08 ,  H04B1/04 ,  H04L25/03

Abstract: Described is an apparatus which comprises: an asynchronous clock generator to generate an asynchronous clock signal; a digital sampler for sampling a signal using the asynchronous clock signal; a duty cycle corrector (DCC) to receive a differential input clock and to generate a differential output clock, wherein the digital sampler to sample at least one of an output clock from the differential output clock; and a counter to count output of the digital sampler and to provide a control to the DCC to adjust duty cycle of the differential output clock.

公开(公告)号：US20160277219A1

公开(公告)日：2016-09-22

申请号：US14660799

申请日：2015-03-17

Applicant: Intel Corporation

Inventor： Hariprasath Venkatram ,  Sami Hyvonen ,  Tawfiq Musah ,  Bryan K. Casper

IPC: H04L25/03 ,  H04L7/033

CPC classification number: H04L25/03057 ,  H04L7/0062 ,  H04L7/033 ,  H04L7/0334 ,  H04L25/03878

Abstract: Described is an apparatus which comprises: an amplifier; a first set of samplers to sample data output from the amplifier according to a clock signal, the set of samplers to generate an output; and a converter to convert the output of the first set of samplers to 1 -hot encoded data.

Abstract translation: 描述了一种装置，包括：放大器; 第一组采样器，用于根据时钟信号对从放大器输出的数据进行采样，该采样器组用于产生输出; 以及将第一组采样器的输出转换为1 -hot编码数据的转换器。

公开(公告)号：US20230208437A1

公开(公告)日：2023-06-29

申请号：US17561246

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Sami Hyvonen ,  Fabrice Paillet ,  James Keith Hodgson ,  Anand Ramasundar ,  Cary Renzema ,  George Matthew ,  Sergio Carlo Rodriguez ,  Po-Cheng Chen ,  Sandeep Chilka ,  Bharadwaj Soundararajan

IPC: H03M7/16 ,  G05F1/46

CPC classification number: H03M7/165 ,  G05F1/46

Abstract: A digitally selectable power gate with thermometer-encoded upper bits may provide solutions for problems digital power gate-based regulators. These solutions may include the use of a fully binary power gate, either in structure or by local decoding of binary control signal to an addressable row-based power gate. This provides improved performance over a row-based code rotation, which is intended to avoid instantaneous overheating of power gate devices but may not mitigate aging effects. Another solution includes ganging a primary DLVR and one or more secondaries. The primary DLVR may include a voltage sense and active controller, which may forward its PG code to secondary instances. Therm and current sensor rotation may be performed locally at the secondaries and a current monitor data may be rolled up from all ganged DLVRs.

公开(公告)号：US20240429930A1

公开(公告)日：2024-12-26

申请号：US18213424

申请日：2023-06-23

Applicant: Intel Corporation

Inventor： Sami Hyvonen ,  Michael Lopez ,  Zachary Brantner

IPC: H03M1/10 ,  H03K3/03

Abstract: An apparatus includes a pair of voltage-controlled oscillators (VCOs). The pair includes a first VCO with a first biasing stage receiving an input voltage signal and a first output stage coupled to the first biasing stage. The first output stage generates a first output frequency signal based on the input voltage signal. The pair also includes a second VCO. The second VCO includes a second biasing stage receiving the input voltage signal and a second output stage coupled to the second biasing stage. The second output stage generates a second output frequency signal based on the input voltage signal.

公开(公告)号：US09761585B2

公开(公告)日：2017-09-12

申请号：US15425393

申请日：2017-02-06

Applicant: INTEL CORPORATION

Inventor： Sami Hyvonen ,  Jad B. Rizk ,  Frank O'Mahony

IPC: H01L27/088 ,  H01L27/12 ,  H01L29/423 ,  H01L29/78 ,  H01L29/93 ,  H03L7/099

CPC classification number: H01L27/0886 ,  H01L27/088 ,  H01L27/1211 ,  H01L29/42376 ,  H01L29/66181 ,  H01L29/785 ,  H01L29/93 ,  H01L29/94 ,  H03L7/099

Abstract: Macro-transistor structures are disclosed. In some cases, the macro-transistor structures have the same number of terminals and properties similar to long-channel transistors, but are suitable for analog circuits in deep-submicron technologies at deep-submicron process nodes. The macro-transistor structures can be implemented, for instance, with a plurality of transistors constructed and arranged in series, and with their gates tied together, generally referred to herein as a transistor stack. One or more of the serial transistors within the stack can be implemented with a plurality of parallel transistors and/or can have a threshold voltage that is different from the threshold voltages of other transistors in the stack. Alternatively, or in addition, one or more of the serial transistors within the macro-transistor can be statically or dynamically controlled to tune the performance characteristics of the macro-transistor. The macro-transistors can be used in numerous circuits, such as varactors, VCOs, PLLs, and tunable circuits.

公开(公告)号：US09537682B2

公开(公告)日：2017-01-03

申请号：US14660799

申请日：2015-03-17

Applicant: Intel Corporation

Inventor： Hariprasath Venkatram ,  Sami Hyvonen ,  Tawfiq Musah ,  Bryan K. Casper

IPC: H04B1/18 ,  H04L25/03 ,  H04L7/033

CPC classification number: H04L25/03057 ,  H04L7/0062 ,  H04L7/033 ,  H04L7/0334 ,  H04L25/03878

Abstract: Described is an apparatus which comprises: an amplifier; a first set of samplers to sample data output from the amplifier according to a clock signal, the set of samplers to generate an output; and a converter to convert the output of the first set of samplers to 1 -hot encoded data.

Abstract translation: 描述了一种装置，包括：放大器; 第一组采样器，用于根据时钟信号对从放大器输出的数据进行采样，该采样器组用于产生输出; 以及将第一组采样器的输出转换为1 -hot编码数据的转换器。