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公开(公告)号：US09374250B1
公开(公告)日：2016-06-21
申请号：US14573343
申请日：2014-12-17
申请人： Intel Corporation
CPC分类号： H04L25/03057 , H04L7/0058 , H04L7/0087 , H04L7/033 , H04L25/03146 , H04L25/14
摘要： Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to sample the input signal, and a decision feedback equalizer (DFE) having DFE slices. The DFE slices include a number of data comparators to provide data information based on the sampling of the input signal, and a number of phase error comparators to provide phase error information associated with the sampling of the input signal. The number of phase error comparators of the DFE slices is not greater than the number of data comparators of the DFE slices.
摘要翻译： 一些实施例包括具有用于接收输入信号的输入的装置和方法，用于接收具有不同相位以对输入信号进行采样的时钟信号的附加输入以及具有DFE切片的判决反馈均衡器（DFE）。 DFE片包括多个数据比较器，用于基于输入信号的采样来提供数据信息，以及多个相位误差比较器，以提供与输入信号的采样相关联的相位误差信息。 DFE切片的相位误差比较器的数量不大于DFE切片的数据比较器的数量。
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公开(公告)号：US20190312756A1
公开(公告)日：2019-10-10
申请号：US16452381
申请日：2019-06-25
申请人： Intel Corporation
摘要： Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
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3.发明申请DIGITALLY TRIMMABLE INTEGRATED RESISTORS INCLUDING RESISTIVE MEMORY ELEMENTS 有权包括电阻记忆元件在内的数字电容式集成电阻公开(公告)号：US20160379695A1
公开(公告)日：2016-12-29
申请号：US14750670
申请日：2015-06-25
申请人： Intel Corporation
发明人： Jaydeep P. Kulkarni , Ashoke Ravi , Dinesh Somasekhar , Ganesh Balamurugan , Sudip Shekhar , Tawfiq Musah , Tzu-Chien Hsueh
CPC分类号： G11C11/161 , G05F3/00 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0004 , G11C13/0011 , G11C13/003 , G11C2213/74 , G11C2213/79 , G11C2213/82 , H03H11/22 , H03K3/356104 , H03K19/018557 , H03K19/018585 , H03M1/12 , H03M1/362 , H03M1/66 , H03M1/765 , H04L25/00
摘要： Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (Mils). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed.
摘要翻译： 实施例包括耦合在信号路径上的电阻器，其包括一个或多个电阻性存储器元件，诸如一个或多个磁性隧道结（Mils）。 电阻式存储器元件的电阻可以被数字可修整以调节电阻器在信号路径上的电阻。 电阻器可以并入到模拟或混合信号电路中，以在信号路径上传递模拟信号。 可以描述和要求保护其他实施例。
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公开(公告)号：US20200091608A1
公开(公告)日：2020-03-19
申请号：US16472830
申请日：2017-12-20
申请人： Intel Corporation
发明人： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asl , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC分类号： H01Q9/04 , H01Q1/38 , H01Q1/48 , H01Q1/24 , H01Q5/47 , H01Q3/24 , H01Q21/24 , H04B1/3827 , H04B15/04 , H04B7/0456 , H04B7/06 , H03L7/14
摘要： Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US10347309B2
公开(公告)日：2019-07-09
申请号：US15439800
申请日：2017-02-22
申请人： Intel Corporation
发明人： Jaydeep P. Kulkarni , Ashoke Ravi , Dinesh Somasekhar , Ganesh Balamurugan , Sudip Shekhar , Tawfiq Musah , Tzu-Chien Hsueh
IPC分类号： G11C11/00 , G11C11/16 , G05F3/00 , G11C13/00 , H03H11/22 , H04L25/00 , H03K19/0185 , H03K3/356 , H03M1/12 , H03M1/66 , H04L25/03 , H03M1/36 , H03M1/76
摘要： Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (MTJs). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed.
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6.发明授权Digitally trimmable integrated resistors including resistive memory elements 有权数字可调式集成电阻，包括电阻式存储器元件公开(公告)号：US09589615B2
公开(公告)日：2017-03-07
申请号：US14750670
申请日：2015-06-25
申请人： Intel Corporation
发明人： Jaydeep P. Kulkarni , Ashoke Ravi , Dinesh Somasekhar , Ganesh Balamurugan , Sudip Shekhar , Tawfiq Musah , Tzu-Chien Hsueh
CPC分类号： G11C11/161 , G05F3/00 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0004 , G11C13/0011 , G11C13/003 , G11C2213/74 , G11C2213/79 , G11C2213/82 , H03H11/22 , H03K3/356104 , H03K19/018557 , H03K19/018585 , H03M1/12 , H03M1/362 , H03M1/66 , H03M1/765 , H04L25/00
摘要： Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (MTJs). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed.
摘要翻译： 实施例包括耦合在信号路径上的电阻器，其包括一个或多个电阻存储器元件，诸如一个或多个磁性隧道结（MTJ）。 电阻式存储器元件的电阻可以被数字可修整以调节电阻器在信号路径上的电阻。 电阻器可以并入到模拟或混合信号电路中以在信号路径上传递模拟信号。 可以描述和要求保护其他实施例。
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公开(公告)号：US09537682B2
公开(公告)日：2017-01-03
申请号：US14660799
申请日：2015-03-17
申请人： Intel Corporation
CPC分类号： H04L25/03057 , H04L7/0062 , H04L7/033 , H04L7/0334 , H04L25/03878
摘要： Described is an apparatus which comprises: an amplifier; a first set of samplers to sample data output from the amplifier according to a clock signal, the set of samplers to generate an output; and a converter to convert the output of the first set of samplers to 1 -hot encoded data.
摘要翻译： 描述了一种装置，包括：放大器; 第一组采样器，用于根据时钟信号对从放大器输出的数据进行采样，该采样器组用于产生输出; 以及将第一组采样器的输出转换为1 -hot编码数据的转换器。
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公开(公告)号：US20220384956A1
公开(公告)日：2022-12-01
申请号：US17734529
申请日：2022-05-02
申请人： Intel Corporation
发明人： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asi , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC分类号： H01Q9/04 , H01Q5/47 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
摘要： Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US11424539B2
公开(公告)日：2022-08-23
申请号：US16472830
申请日：2017-12-20
申请人： Intel Corporation
发明人： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asl , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC分类号： H01Q5/47 , H01Q9/04 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
摘要： Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US10756931B2
公开(公告)日：2020-08-25
申请号：US16452381
申请日：2019-06-25
申请人： Intel Corporation
摘要： Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
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