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公开(公告)号：US11955732B2
公开(公告)日：2024-04-09
申请号：US18089220
申请日：2022-12-27
Applicant: Intel Corporation
Inventor： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asl , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC: H01Q9/04 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q5/47 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
CPC classification number: H01Q9/0414 , H01Q1/243 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q5/47 , H01Q21/24 , H03L7/145 , H04B1/3827 , H04B7/0482 , H04B7/0639 , H04B15/04
Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US11003534B2
公开(公告)日：2021-05-11
申请号：US16844925
申请日：2020-04-09
Applicant: Intel Corporation
Inventor： Bryan K. Casper , Stephen R. Mooney , David Dunning , Mozhgan Mansuri , James E. Jaussi
Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for hybrid memory. In one embodiment, a hybrid memory may include a package substrate. The hybrid memory may also include a hybrid memory buffer chip attached to the first side of the package substrate. High speed input/output (HSIO) logic supporting a HSIO interface with a processor. The hybrid memory also includes packet processing logic to support a packet processing protocol on the HSIO interface. Additionally, the hybrid memory also has one or more memory tiles that are vertically stacked on the hybrid memory buffer.
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公开(公告)号：US10664430B2
公开(公告)日：2020-05-26
申请号：US16258429
申请日：2019-01-25
Applicant: Intel Corporation
Inventor： Tzu-Chien Hsueh , Ganesh Balamurugan , Bryan K. Casper
IPC: G06F13/40 , G06F1/18 , H04L25/02 , G06F1/3287 , G06F1/3296 , G06F13/36 , G06F13/20 , G06F13/42
Abstract: Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.
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公开(公告)号：US20190312756A1
公开(公告)日：2019-10-10
申请号：US16452381
申请日：2019-06-25
Applicant: Intel Corporation
Inventor： Tawfiq Musah , Hariprasath Venkatram , Bryan K. Casper
Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
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公开(公告)号：US09800001B2
公开(公告)日：2017-10-24
申请号：US15152019
申请日：2016-05-11
Applicant: Intel Corporation
Inventor： James E. Jaussi , Stephen R. Mooney , Howard L. Heck , Bruce E. Pederson , Bryan K. Casper
CPC classification number: H01R24/64 , H01R12/721 , H01R13/66 , H01R13/6658 , H01R24/28 , H01R24/62 , H01R2107/00
Abstract: Methods and systems may include an input/output (IO) interface that has an integrated buffer, a housing and a substrate disposed within the housing. The substrate may include a first side, a second side and a connection edge. The integrated buffer can be coupled to at least one of the first side and the second side of the substrate. A plurality of rows of contacts may be coupled to the first side of the substrate. Each row of contacts can be stacked substantially parallel to the connection edge. The substrate may have power outputs coupled thereto and the integrated buffer can include a voltage regulator that has a supply output coupled to the power outputs.
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Patent Agency Ranking
公开(公告)号：US20170168969A1
公开(公告)日：2017-06-15
申请号：US15440568
申请日：2017-02-23
Applicant: Intel Corporation
Inventor： Tsu-Chien HSUEH , Ganesh BALAMURUGAN , Bryan K. Casper
CPC classification number: G06F13/4072 , G06F1/189 , G06F1/3287 , G06F1/3296 , G06F13/20 , G06F13/36 , G06F13/4282 , H04L25/0272
Abstract: Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.
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公开(公告)号：US20220384956A1
公开(公告)日：2022-12-01
申请号：US17734529
申请日：2022-05-02
Applicant: Intel Corporation
Inventor： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asi , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC: H01Q9/04 , H01Q5/47 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US11424539B2
公开(公告)日：2022-08-23
申请号：US16472830
申请日：2017-12-20
Applicant: Intel Corporation
Inventor： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asl , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC: H01Q5/47 , H01Q9/04 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US10756931B2
公开(公告)日：2020-08-25
申请号：US16452381
申请日：2019-06-25
Applicant: Intel Corporation
Inventor： Tawfiq Musah , Hariprasath Venkatram , Bryan K. Casper
Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
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公开(公告)号：US09794089B2
公开(公告)日：2017-10-17
申请号：US15187382
申请日：2016-06-20
Applicant: Intel Corporation
Inventor： Tawfiq Musah , Gokce Keskin , Ganesh Balamurugan , James E. Jaussi , Bryan K. Casper
CPC classification number: H04L25/03057 , H04L7/0058 , H04L7/0087 , H04L7/033 , H04L25/03146 , H04L25/14
Abstract: Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to sample the input signal, and a decision feedback equalizer (DFE) having DFE slices. The DFE slices include a number of data comparators to provide data information based on the sampling of the input signal, and a number of phase error comparators to provide phase error information associated with the sampling of the input signal. The number of phase error comparators of the DFE slices is not greater than the number of data comparators of the DFE slices.
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