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    Decoupled via fill
    2.
    发明授权
    Decoupled via fill 有权

    公开(公告)号：US10468298B2

    公开(公告)日：2019-11-05

    申请号：US16249593

    申请日：2019-01-16

    申请人： Intel Corporation

    发明人： Yuriy V. Shusterman ,  Flavio Griggio ,  Tejaswi K. Indukuri ,  Ruth A. Brain

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L21/321 ,  H01L21/3213 ,  H01L23/31 ,  H01L23/532 ,  H01L23/528

    摘要： Techniques are disclosed for providing a decoupled via fill. Given a via trench, a first barrier layer is conformally deposited onto the bottom and sidewalls of the trench. A first metal fill is blanket deposited into the trench. The non-selective deposition is subsequently recessed so that only a portion of the trench is filled with the first metal. The previously deposited first barrier layer is removed along with the first metal, thereby re-exposing the upper sidewalls of the trench. A second barrier layer is conformally deposited onto the top of the first metal and the now re-exposed trench sidewalls. A second metal fill is blanket deposited into the remaining trench. Planarization and/or etching can be carried out as needed for subsequent processing. Thus, a methodology for filling high aspect ratio vias using a dual metal process is provided. Note, however, the first and second fill metals may be the same.

    LAYER TRANSFERRED FERROELECTRIC MEMORY DEVICES
    4.
    发明申请
    LAYER TRANSFERRED FERROELECTRIC MEMORY DEVICES 审中-公开

    公开(公告)号：US20190115353A1

    公开(公告)日：2019-04-18

    申请号：US16082261

    申请日：2016-04-01

    申请人： Intel Corporation

    发明人： Kevin P. O'Brien ,  Brian S. Doyle ,  Kaan Oguz ,  Charles C. Kuo ,  Mark L. Doczy ,  Tejaswi K. Indukuri

    IPC分类号： H01L27/1159 ,  H01L27/11587 ,  H01L29/78 ,  G11C11/22

    摘要： A monocrystalline metal-oxide stack including a ferroelectric (FE) tunneling layer and a buffer layer is epitaxially grown on a growth substrate. A first polycrystalline metal electrode layer is deposited over the tunneling layer. A bonding material layer is further deposited over the electrode layer. The bonding material layer is then bonded to a material layer on a front or back side of a host substrate that further comprises a transistor cell. Once bonded, the growth substrate may be removed from the metal-oxide stack to complete a transfer of the metal-oxide stack from the growth substrate to the host substrate. A second polycrystalline metal electrode layer is then deposited over the exposed buffer layer, placing both electrodes in close proximity to the FE tunneling layer.

    Seam healing of metal interconnects
    5.
    发明授权
    Seam healing of metal interconnects 有权

    公开(公告)号：US10068845B2

    公开(公告)日：2018-09-04

    申请号：US15126575

    申请日：2014-06-16

    申请人： Intel Corporation

    发明人： Ramanan V. Chebiam ,  Christopher J. Jezewski ,  Tejaswi K. Indukuri ,  James S. Clarke ,  John J. Plombon

    IPC分类号： H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L21/321

    摘要： Embodiments of the present disclosure describe removing seams and voids in metal interconnects and associated techniques and configurations. In one embodiment, a method includes conformally depositing a metal into a recess disposed in a dielectric material to form an interconnect, wherein conformally depositing the metal creates a seam or void in the deposited metal within or directly adjacent to the recess and heating the metal in the presence of a reactive gas to remove the seam or void, wherein the metal has a melting point that is greater than a melting point of copper. Other embodiments may be described and/or claimed.

    Decoupled via fill
    7.
    发明授权
    Decoupled via fill 有权

    公开(公告)号：US10903114B2

    公开(公告)日：2021-01-26

    申请号：US16582923

    申请日：2019-09-25

    申请人： Intel Corporation

    发明人： Yuriy V. Shusterman ,  Flavio Griggio ,  Tejaswi K. Indukuri ,  Ruth A. Brain

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L21/768 ,  H01L23/532 ,  H01L21/321 ,  H01L21/3213 ,  H01L23/31 ,  H01L23/528

    摘要： Techniques are disclosed for providing a decoupled via fill. Given a via trench, a first barrier layer is conformally deposited onto the bottom and sidewalls of the trench. A first metal fill is blanket deposited into the trench. The non-selective deposition is subsequently recessed so that only a portion of the trench is filled with the first metal. The previously deposited first barrier layer is removed along with the first metal, thereby re-exposing the upper sidewalls of the trench. A second barrier layer is conformally deposited onto the top of the first metal and the now re-exposed trench sidewalls. A second metal fill is blanket deposited into the remaining trench. Planarization and/or etching can be carried out as needed for subsequent processing. Thus, a methodology for filling high aspect ratio vias using a dual metal process is provided. Note, however, the first and second fill metals may be the same.