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公开(公告)号:US09952511B2
公开(公告)日:2018-04-24
申请号:US15122403
申请日:2014-12-19
申请人: Intel Corporation
IPC分类号: G03F7/20 , H01J37/30 , H01J37/06 , H01J37/147 , H01L21/027 , H01J37/317 , H01L21/311
CPC分类号: G03F7/2037 , H01J37/045 , H01J37/06 , H01J37/1474 , H01J37/3007 , H01J37/3026 , H01J37/3174 , H01J37/3177 , H01J2237/0435 , H01J2237/0453 , H01J2237/303 , H01J2237/30422 , H01J2237/30438 , H01J2237/31762 , H01J2237/31764 , H01J2237/31776 , H01J2237/31796 , H01L21/0277 , H01L21/31144
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool is described. The BAA is a non-universal cutter.
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公开(公告)号:US10067416B2
公开(公告)日:2018-09-04
申请号:US15873782
申请日:2018-01-17
申请人: Intel Corporation
IPC分类号: G03F1/20 , G03F7/20 , H01J37/30 , H01L21/768 , H01J37/317 , H01J37/302 , H01J37/04
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool is described. The BAA includes three distinct aperture arrays of different pitch.
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公开(公告)号:US09899182B2
公开(公告)日:2018-02-20
申请号:US15329880
申请日:2014-12-22
申请人: INTEL CORPORATION
发明人: Yan A. Borodovsky
IPC分类号: H01J3/36 , G03F7/20 , H01L21/027 , H01J37/04 , H01J37/317
CPC分类号: H01J37/045 , H01J37/3026 , H01J37/3174 , H01J37/3177 , H01J2237/0435 , H01J2237/0453 , H01J2237/30422 , H01J2237/30438 , H01J2237/31762 , H01J2237/31764 , H01J2237/31769
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool includes a first column of openings along a first direction, each of the openings of the first column of openings having dog-eared corners. The BAA also includes a second column of openings along the first direction and staggered from the first column of openings, each of the openings of the second column of openings having dog-eared corners. The first and second columns of openings together form an array having a pitch in the first direction. A scan direction of the BAA is along a second direction, orthogonal to the first direction. The pitch of the array corresponds to half of a minimal pitch layout of a target pattern of lines for orientation parallel with the second direction.
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公开(公告)号:US10236161B2
公开(公告)日:2019-03-19
申请号:US15555447
申请日:2015-09-18
申请人: Intel Corporation
发明人: Yan A. Borodovsky
IPC分类号: G06K9/00 , H01J37/304 , H01L21/027 , H01L21/033 , H01J37/317 , H01L21/311 , H01L23/544 , H01J37/04 , H01J37/09 , H01J37/20 , H01J37/244
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a method of fine alignment of an e-beam tool includes projecting an electron image of a plurality of apertures of an e-beam column over an X-direction alignment feature of a wafer while moving the wafer along the Y-direction. The method also includes detecting a time-resolved back-scattered electron (BSE) detection response waveform during the projecting. The method also includes determining an X-position of every edge of every feature of the X-direction alignment feature by calculating a derivative of the BSE detection response waveform. The method also includes, subsequent to determining an X-position of every edge of every feature of the X-direction alignment feature, adjusting an alignment of the e-beam column to the wafer.
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公开(公告)号:US10216087B2
公开(公告)日:2019-02-26
申请号:US15122622
申请日:2014-12-19
申请人: Intel Corporation
IPC分类号: G03F7/20 , H01L21/027 , H01J37/317 , H01L21/311
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool includes a first column of openings along a first direction. The BAA also includes a second column of openings along the first direction and staggered from the first column of openings. The first and second columns of openings together form an array having a pitch in the first direction. A scan direction of the BAA is along a second direction, orthogonal to the first direction. The pitch of the array corresponds to half of a minimal pitch layout of a target pattern of lines for orientation parallel with the second direction.
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公开(公告)号:US10191376B2
公开(公告)日:2019-01-29
申请号:US15329835
申请日:2014-12-22
申请人: INTEL CORPORATION
发明人: Yan A. Borodovsky
IPC分类号: G03F7/20 , H01L21/68 , H01L21/027 , H01L21/033 , H01L21/308 , H01L21/311 , H01L21/3213 , H01J37/317 , H01L21/768 , H01J37/04 , H01J37/302
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a column for an e-beam direct write lithography tool includes a first blanker aperture array (BAA) including a staggered array of openings having a pitch along an array direction. The array direction is orthogonal to a scan direction. Each opening has a first dimension in the array direction. The column also includes a second BAA including a staggered array of openings having the pitch along the array direction. Each opening has a second dimension in the array direction, the second dimension greater than the first dimension.
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公开(公告)号:US10747115B2
公开(公告)日:2020-08-18
申请号:US16228315
申请日:2018-12-20
申请人: INTEL CORPORATION
发明人: Yan A. Borodovsky
IPC分类号: G03F7/20 , H01L21/768 , H01J37/302 , H01L21/033 , H01L21/308 , H01L21/311 , H01L21/3213 , H01J37/317 , H01J37/04 , H01L21/027 , H01L29/66
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a column for an e-beam direct write lithography tool includes a first blanker aperture array (BAA) including a staggered array of openings having a pitch along an array direction. The array direction is orthogonal to a scan direction. Each opening has a first dimension in the array direction. The column also includes a second BAA including a staggered array of openings having the pitch along the array direction. Each opening has a second dimension in the array direction, the second dimension greater than the first dimension.
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公开(公告)号:US10338474B2
公开(公告)日:2019-07-02
申请号:US15528329
申请日:2015-06-18
申请人: Intel Corporation
IPC分类号: G03F7/09 , G03F7/11 , G03F7/20 , H01L21/027 , H01L21/3213 , H01L21/311 , H01L21/8234
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. Particular embodiments are directed to implementation of an underlying absorbing and/or conducting layer for ebeam direct write (EBDW) lithography.
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公开(公告)号:US10290528B2
公开(公告)日:2019-05-14
申请号:US15122792
申请日:2014-12-22
申请人: Intel Corporation
IPC分类号: G03F9/00 , H01L21/68 , H01L21/027 , H01J37/317 , H01L21/311
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a method of real-time alignment of a wafer situated on a stage of an e-beam tool involves collecting backscattered electrons from an underlying patterned feature of the wafer while an e-beam column of the e-beam tool writes during scanning of the stage. The collecting is performed by an electron detector placed at the e-beam column bottom. The method also involves performing linear corrections of an alignment of the stage relative to the e-beam column based on the collecting.
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公开(公告)号:US10014256B2
公开(公告)日:2018-07-03
申请号:US15122396
申请日:2014-12-19
申请人: Intel Corporation
IPC分类号: H01L23/48 , H01L23/528 , H01L21/027 , H01L21/311 , H01J37/04 , H01J37/317 , H01L21/768 , H01L27/02 , H01L27/11
CPC分类号: H01L23/5283 , H01J37/045 , H01J37/3177 , H01J2237/0435 , H01J2237/0453 , H01J2237/303 , H01J2237/30422 , H01J2237/30438 , H01J2237/31762 , H01J2237/31764 , H01L21/0277 , H01L21/31144 , H01L21/76816 , H01L21/76886 , H01L27/0207 , H01L27/11
摘要: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a layout for a metallization layer of an integrated circuit includes a first region having a plurality of unidirectional lines of a first width and a first pitch and parallel with a first direction. The layout also includes a second region having a plurality of unidirectional lines of a second width and a second pitch and parallel with the first direction, the second width and the second pitch different than the first width and the first pitch, respectively. The layout also includes a third region having a plurality of unidirectional lines of a third width and a third pitch and parallel with the first direction, the third width and the third pitch different than the first and second widths and different than the first and second pitches.
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