公开(公告)号：US20140166840A1

公开(公告)日：2014-06-19

申请号：US13716044

申请日：2012-12-14

Applicant: INTERMOLECULAR, INC.

Inventor： Wayne R. French ,  Kent Riley Child ,  Alonzo T. Collins ,  Jay B. Dedontney ,  Richard R. Endo ,  Aaron T. Francis ,  Zachary Fresco ,  Edward L. Haywood ,  Ashley David Lacey ,  Monica Sawkar Mathur ,  James Tsung ,  Danny Wang ,  Kenneth A. Williams ,  Maosheng Zhao

IPC: H01L21/687

CPC classification number: H01L21/68728 ,  H01L21/68757

Abstract: A substrate carrier is provided. The substrate carrier includes a base for supporting a substrate. A plurality of support tabs is affixed to a surface of the base. The plurality of support tabs have a cavity defined within an inner region of each support tab of the plurality of support tabs. A plurality of protrusions extends from the surface of the base, wherein one of the plurality of protrusions mates with one cavity to support one of the plurality of support tabs. A film is deposited over the surface of the base, surfaces of the plurality of support tabs and surfaces of the plurality of protrusions.

Abstract translation: 提供衬底载体。 衬底载体包括用于支撑衬底的基底。 多个支撑片固定到基座的表面上。 多个支撑突片具有限定在多个支撑突片中的每个支撑突片的内部区域内的空腔。 多个突起从基座的表面延伸，其中多个突起中的一个与一个空腔配合，以支撑多个支撑突片中的一个。 薄膜沉积在基底的表面上，多个支撑突片的表面和多个突起的表面。

公开(公告)号：US20150179933A1

公开(公告)日：2015-06-25

申请号：US14136365

申请日：2013-12-20

Applicant: Intermolecular, Inc.

Inventor： Monica Sawkar Mathur ,  Venkat Ananthan ,  Mark Clark ,  Prashant B. Phatak

IPC: H01L45/00

CPC classification number: H01L27/2418 ,  H01L27/2463 ,  H01L45/00 ,  H01L45/08

Abstract: Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on a single dielectric layer or on a multilayer dielectric stack.

Abstract translation: 公开了可适用于非易失性存储器件应用的控制元件。 控制元件可以在低电压下具有低漏电流，以减少非选定器件的潜行电流路径，以及高电压下的高泄漏电流，以最大限度地减少器件切换期间的电压降。 控制元件可以基于单个电介质层或多层电介质叠层。

公开(公告)号：US08981327B1

公开(公告)日：2015-03-17

申请号：US14138853

申请日：2013-12-23

Applicant: Intermolecular, Inc.

Inventor： Monica Sawkar Mathur ,  Prashant B. Phatak

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/00 ,  H01L45/08

Abstract: Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non-selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on multilayer dielectric stacks. The control element can include a titanium oxide-carbon-doped silicon-titanium oxide multilayer stack. Electrode materials may include one of ruthenium, titanium nitride, or carbon. The titanium oxide layers may be replaced by one of zirconium oxide, hafnium oxide, aluminum oxide, magnesium oxide, or a lanthanide oxide.

Abstract translation: 公开了可适用于非易失性存储器件应用的控制元件。 控制元件在低电压下可以具有低泄漏电流，以减少非选定器件的潜行电流路径，以及高电压下的高泄漏电流，以最大限度地减少器件切换期间的电压降。 控制元件可以基于多层介质堆叠。 控制元件可以包括氧化钛 - 碳掺杂的硅 - 氧化钛多层堆叠。 电极材料可以包括钌，氮化钛或碳中的一种。 氧化钛层可以由氧化锆，氧化铪，氧化铝，氧化镁或镧系元素氧化物中的一种代替。

公开(公告)号：US08975610B1

公开(公告)日：2015-03-10

申请号：US14138823

申请日：2013-12-23

Applicant: Intermolecular, Inc.

Inventor： Monica Sawkar Mathur ,  Prashant B. Phatak

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/00 ,  H01L45/08

Abstract: Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non-selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on multilayer dielectric stacks. The control element can include a titanium oxide-silicon-titanium oxide multilayer stack. Electrode materials may include one of ruthenium, titanium nitride, or carbon. The control element can include a silicon nitride-silicon-silicon nitride multilayer stack. Electrode materials may include titanium nitride.

Abstract translation: 公开了可适用于非易失性存储器件应用的控制元件。 控制元件在低电压下可以具有低泄漏电流，以减少非选定器件的潜行电流路径，以及高电压下的高泄漏电流，以最大限度地减少器件切换期间的电压降。 控制元件可以基于多层介质堆叠。 控制元件可以包括氧化钛 - 硅 - 氧化钛多层叠层。 电极材料可以包括钌，氮化钛或碳中的一种。 控制元件可以包括氮化硅 - 硅 - 氮化硅多层叠层。 电极材料可以包括氮化钛。

公开(公告)号：US08737036B2

公开(公告)日：2014-05-27

申请号：US13657782

申请日：2012-10-22

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Nobumichi Fuchigami ,  Imran Hashim ,  Edward L. Haywood ,  Pragati Kumar ,  Sandra G. Malhotra ,  Monica Sawkar Mathur ,  Prashant B. Phatak ,  Sunil Shanker

IPC: H01G4/30

CPC classification number: H01G4/1218 ,  C23C16/405 ,  C23C16/45531 ,  C23C16/56 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/3142 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle. The process provides high deposition rates, and the resulting MIM structure has substantially no x-ray diffraction peaks associated with anatase-phase titanium oxide.

Abstract translation: 本公开内容提供（a）制造基于氧化钛的氧化物层（例如电介质层）的方法，以抑制锐钛矿相氧化钛的形成和（b）相关的器件和结构。 使用底部电极（或其他基底）的臭氧预处理随后进行ALD工艺来形成金属 - 绝缘体 - 金属（“MIM”）堆叠，以形成根植于使用含酰胺的前体的TiO 2电介质。 在ALD工艺之后，氧化退火工艺的应用热度足以愈合TiO2电介质中的缺陷，并降低TiO2和电极之间的界面态; 选择退火温度以使其不那么热，以致破坏BEL表面粗糙度。 进一步的工艺变型可以包括在ALD工艺期间掺杂氧化钛，基座加热至275-300摄氏度，对于BEL使用铂或钌，对于每个ALD工艺循环使用多个试剂脉冲的臭氧。 该方法提供高沉积速率，并且所得MIM结构基本上没有与锐钛矿相氧化钛相关的x射线衍射峰。

公开(公告)号：US09443906B2

公开(公告)日：2016-09-13

申请号：US14136365

申请日：2013-12-20

Applicant: Intermolecular, Inc.

Inventor： Monica Sawkar Mathur ,  Venkat Ananthan ,  Mark Clark ,  Prashant B. Phatak

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L27/2418 ,  H01L27/2463 ,  H01L45/00 ,  H01L45/08

Abstract: Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on a single dielectric layer or on a multilayer dielectric stack.

Abstract translation: 公开了可适用于非易失性存储器件应用的控制元件。 控制元件可以在低电压下具有低漏电流，以减少非选定器件的潜行电流路径，以及高电压下的高泄漏电流，以最大限度地减少器件切换期间的电压降。 控制元件可以基于单个电介质层或多层电介质叠层。

公开(公告)号：US20150179934A1

公开(公告)日：2015-06-25

申请号：US14136465

申请日：2013-12-20

Applicant: Intermolecular, Inc.

Inventor： Monica Sawkar Mathur ,  Venkat Ananthan ,  Prashant B. Phatak

IPC: H01L45/00

CPC classification number: H01L27/2418 ,  H01L27/2463 ,  H01L45/00 ,  H01L45/08

Abstract: Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on multilayer dielectric stacks. The control element can include a zirconium oxide-strontium-titanium oxide-zirconium oxide multilayer stack. The zirconium oxide can be replaced by at least one of hafnium oxide, aluminum oxide, magnesium oxide, or one of the lanthanide oxides.

Abstract translation: 公开了可适用于非易失性存储器件应用的控制元件。 控制元件可以在低电压下具有低漏电流，以减少非选定器件的潜行电流路径，以及高电压下的高泄漏电流，以最大限度地减少器件切换期间的电压降。 控制元件可以基于多层介质堆叠。 控制元件可以包括氧化锆 - 锶 - 氧化钛 - 氧化锆多层堆叠。 氧化锆可以由氧化铪，氧化铝，氧化镁或镧系元素氧化物中的至少一种代替。

公开(公告)号：US09012878B1

公开(公告)日：2015-04-21

申请号：US14138877

申请日：2013-12-23

Applicant: Intermolecular, Inc.

Inventor： Monica Sawkar Mathur

IPC: H01L45/00

CPC classification number: H01L45/04 ,  H01L27/2418 ,  H01L45/00 ,  H01L45/08 ,  H01L45/1233

Abstract: In some embodiments, control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on multilayer dielectric stacks. The control element can include a zirconium oxide-molybdenum oxide-zirconium oxide multilayer stack. The control element can be based on multilayer dielectric stacks. The control element can include a molybdenum oxide-zirconium oxide-molybdenum oxide multilayer stack. The zirconium oxide in either of the two configurations can be replaced by at least one of hafnium oxide, aluminum oxide, magnesium oxide, or the lanthanide oxides.

Abstract translation: 在一些实施例中，公开了可适用于非易失性存储器件应用的控制元件。 控制元件可以在低电压下具有低漏电流，以减少非选定器件的潜行电流路径，以及高电压下的高泄漏电流，以最大限度地减少器件切换期间的电压降。 控制元件可以基于多层介质堆叠。 控制元件可以包括氧化锆 - 氧化钼 - 氧化锆多层叠层。 控制元件可以基于多层介质堆叠。 控制元件可以包括氧化钼 - 氧化锆 - 氧化钼多层叠层。 两种构型中的任一种的氧化锆可以由氧化铪，氧化铝，氧化镁或镧系元素氧化物中的至少一种代替。

公开(公告)号：US20130044404A1

公开(公告)日：2013-02-21

申请号：US13657782

申请日：2012-10-22

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Nobumichi Fuchigami ,  Imran Hashim ,  Edward L. Haywood ,  Pragati KUMAR ,  Sandra G. Malhotra ,  Monica Sawkar Mathur ,  Prashant B. Phatak ,  Sunil Shanker

IPC: H01G4/30 ,  H01G4/018

CPC classification number: H01G4/1218 ,  C23C16/405 ,  C23C16/45531 ,  C23C16/56 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/3142 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle. The process provides high deposition rates, and the resulting MIM structure has substantially no x-ray diffraction peaks associated with anatase-phase titanium oxide.

Abstract translation: 本公开内容提供（a）制造基于氧化钛的氧化物层（例如电介质层）的方法，以抑制锐钛矿相氧化钛的形成和（b）相关的器件和结构。 使用底部电极（或其他基底）的臭氧预处理随后进行ALD工艺形成金属 - 绝缘体 - 金属（MIM）堆叠，以形成使用含酰胺前体的TiO 2电介质。 在ALD工艺之后，氧化退火工艺的应用热度足以愈合TiO2电介质中的缺陷，并降低TiO2和电极之间的界面态; 选择退火温度以使其不那么热，以致破坏BEL表面粗糙度。 进一步的工艺变型可以包括在ALD工艺期间掺杂氧化钛，基座加热至275-300摄氏度，对于BEL使用铂或钌，对于每个ALD工艺循环使用多个试剂脉冲的臭氧。 该方法提供高沉积速率，并且所得MIM结构基本上没有与锐钛矿相氧化钛相关的x射线衍射峰。