公开(公告)号：US20140141534A1

公开(公告)日：2014-05-22

申请号：US13680701

申请日：2012-11-19

Applicant: INTERMOLECULAR INC.

Inventor： Prashant B. Phatak ,  Venkat Ananthan ,  Wayne R. French

IPC: H01L21/66 ,  H01L21/3105

CPC classification number: H01L22/20 ,  B01J19/0046 ,  B01J2219/00274 ,  B01J2219/0043 ,  B01J2219/00443 ,  B01J2219/00527 ,  B01J2219/00585 ,  B01J2219/00596 ,  B01J2219/00659 ,  B01J2219/00702 ,  B01J2219/00754 ,  B01J2219/00756 ,  C23C14/042 ,  C40B40/18 ,  C40B50/14 ,  C40B60/08

Abstract: A combination of deposition processes can be used to evaluate layer properties using a combinatorial workflow. The processes can include a base ALD process and another process, such as a PVD process. The high productivity combinatorial technique can provide an evaluation of the material properties for given ALD base layer and PVD additional elements. An ALD process can then be developed to provide the desired layers, replacing the ALD and PVD combination.

Abstract translation: 沉积过程的组合可用于使用组合工作流来评估层的性质。 这些过程可以包括碱性ALD工艺和另一种工艺，如PVD工艺。 高生产率组合技术可以为给定的ALD基层和PVD附加元素提供材料性质的评估。 然后可以开发ALD工艺以提供所需的层，代替ALD和PVD组合。

公开(公告)号：US20140256111A1

公开(公告)日：2014-09-11

申请号：US14281550

申请日：2014-05-19

Applicant: Intermolecular Inc.

Inventor： Sandra G. Malhotra ,  Sean Barstow ,  Tony P. Chiang ,  Wayne R. French ,  Pragati Kumar ,  Prashant B. Phatak ,  Sunil Shanker ,  Wen Wu

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

Abstract translation: 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。

公开(公告)号：US20140166840A1

公开(公告)日：2014-06-19

申请号：US13716044

申请日：2012-12-14

Applicant: INTERMOLECULAR, INC.

Inventor： Wayne R. French ,  Kent Riley Child ,  Alonzo T. Collins ,  Jay B. Dedontney ,  Richard R. Endo ,  Aaron T. Francis ,  Zachary Fresco ,  Edward L. Haywood ,  Ashley David Lacey ,  Monica Sawkar Mathur ,  James Tsung ,  Danny Wang ,  Kenneth A. Williams ,  Maosheng Zhao

IPC: H01L21/687

CPC classification number: H01L21/68728 ,  H01L21/68757

Abstract: A substrate carrier is provided. The substrate carrier includes a base for supporting a substrate. A plurality of support tabs is affixed to a surface of the base. The plurality of support tabs have a cavity defined within an inner region of each support tab of the plurality of support tabs. A plurality of protrusions extends from the surface of the base, wherein one of the plurality of protrusions mates with one cavity to support one of the plurality of support tabs. A film is deposited over the surface of the base, surfaces of the plurality of support tabs and surfaces of the plurality of protrusions.

Abstract translation: 提供衬底载体。 衬底载体包括用于支撑衬底的基底。 多个支撑片固定到基座的表面上。 多个支撑突片具有限定在多个支撑突片中的每个支撑突片的内部区域内的空腔。 多个突起从基座的表面延伸，其中多个突起中的一个与一个空腔配合，以支撑多个支撑突片中的一个。 薄膜沉积在基底的表面上，多个支撑突片的表面和多个突起的表面。