公开(公告)号：US20230369220A1

公开(公告)日：2023-11-16

申请号：US17662874

申请日：2022-05-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Sagarika Mukesh ,  Nikhil Jain ,  Devika Sarkar Grant ,  Ruilong Xie ,  Kisik Choi ,  Prabudhya Roy Chowdhury

IPC: H01L23/528 ,  H01L21/8234 ,  H01L21/768 ,  H01L23/522 ,  H01L29/786

CPC classification number: H01L23/5286 ,  H01L21/823475 ,  H01L21/76897 ,  H01L23/5226 ,  H01L29/78696 ,  H01L29/0673

Abstract: According to the embodiment of the present invention, a semiconductor device includes a first source/drain and a second source/drain. A first source/drain contact includes a first portion and a second portion. The first portion of the first source/drain contact is located directly atop the first source/drain. The second portion of the first source/drain contact extends vertically past the first source/drain. The first source/drain is in direct contact with three different sides of a first section of the second portion of the first source/drain contact.

公开(公告)号：US20240162319A1

公开(公告)日：2024-05-16

申请号：US18054958

申请日：2022-11-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Su Chen Fan ,  Albert M. Young ,  Ruilong Xie ,  Prabudhya Roy Chowdhury ,  Jay William Strane

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L29/0673 ,  H01L29/66545 ,  H01L29/78696

Abstract: Embodiments of the invention include a stacked device having a first epitaxial region and a second epitaxial region vertically displaced from the first epitaxial region. The first epitaxial region comprising an asymmetric profile with a horizontal protrusion. A contact is formed on the horizontal protrusion of the first epitaxial region

公开(公告)号：US20240072146A1

公开(公告)日：2024-02-29

申请号：US17896631

申请日：2022-08-26

Applicant: International Business Machines Corporation

Inventor： Liqiao Qin ,  Nikhil Jain ,  Prabudhya Roy Chowdhury ,  Sagarika Mukesh ,  Tao Li ,  Kisik Choi ,  Ruilong Xie

IPC: H01L29/423 ,  H01L23/528 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L23/5286 ,  H01L29/78696

Abstract: A semiconductor device includes a first transistor including a first source/drain region, and a second transistor stacked on the first transistor. The second transistor includes a second source/drain region. The semiconductor device further includes a via structure disposed between a power element and the second source/drain region. The via structure includes a first via disposed on the power element, and a second via disposed on the first via, wherein the second via is angled with respect to the first via.

公开(公告)号：US20240136288A1

公开(公告)日：2024-04-25

申请号：US17972892

申请日：2022-10-24

Applicant: International Business Machines Corporation

Inventor： Nikhil Jain ,  Prabudhya Roy Chowdhury ,  Kisik Choi ,  Ruilong Xie

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/48 ,  H01L27/12

CPC classification number: H01L23/5286 ,  H01L21/76898 ,  H01L23/481 ,  H01L27/124 ,  H01L27/1266 ,  H01L21/76224

Abstract: A semiconductor device includes: a channel having layers of silicon separated from each other; a metal gate in contact with the layers of silicon; source/drain regions adjacent to the metal gate; a frontside power rail extending through the layers of silicon; a dielectric separating the frontside power rail from the metal gate; a via-connect buried power rail extending through the dielectric and coupling the frontside power rail to the source/drain regions; and a backside power rail coupled to the frontside power rail. The layers of silicon are wrapped on three sides by the metal gate.

公开(公告)号：US20240105554A1

公开(公告)日：2024-03-28

申请号：US17950361

申请日：2022-09-22

Applicant: International Business Machines Corporation

Inventor： Tao Li ,  Liqiao Qin ,  Devika Sarkar Grant ,  Nikhil Jain ,  Prabudhya Roy Chowdhury ,  Sagarika Mukesh ,  Kisik Choi ,  Ruilong Xie

IPC: H01L23/48 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L23/481 ,  H01L29/0847 ,  H01L29/6656

Abstract: A semiconductor structure includes a source/drain region; a frontside source/drain contact disposed on the source/drain region, a via-to-backside power rail disposed on the frontside source/drain contact and on a portion of the source/drain region, and a backside power rail connected to the via-to-backside power rail.

公开(公告)号：US20240088233A1

公开(公告)日：2024-03-14

申请号：US17943602

申请日：2022-09-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Prabudhya Roy Chowdhury ,  Nikhil Jain ,  Kisik Choi ,  Ruilong Xie

IPC: H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L29/401 ,  H01L29/41733 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/775 ,  H01L29/42392

Abstract: A semiconductor device includes a source/drain having a height, a length, and a width. A full wrap-around contact surrounds a partial length of the source/drain, wherein the full wrap-around contact includes a partial front-side wrap-around contact from a front side of a substrate and a partial back-side wrap-around contact from a back side of the substrate.

公开(公告)号：US20250087527A1

公开(公告)日：2025-03-13

申请号：US18466783

申请日：2023-09-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Prabudhya Roy Chowdhury ,  Daniel Charles Edelstein ,  Shay Reboh

IPC: H01L21/74 ,  H01L21/768 ,  H01L21/8238 ,  H01L23/528 ,  H01L23/535

Abstract: A semiconductor device includes a device wafer, including a silicon wafer. A handler wafer is bonded to the device wafer. The handler wafer includes a 111 crystallographic direction silicon substrate.

公开(公告)号：US20240290730A1

公开(公告)日：2024-08-29

申请号：US18175985

申请日：2023-02-28

Applicant: International Business Machines Corporation

Inventor： Sathyanarayanan Raghavan ,  Mukta Ghate Farooq ,  Prabudhya Roy Chowdhury

IPC: H01L23/00 ,  H01L21/304 ,  H01L23/053 ,  H01L25/065

CPC classification number: H01L23/562 ,  H01L21/3043 ,  H01L23/053 ,  H01L25/0657

Abstract: A semiconductor structure for tailoring a die stiffness. The semiconductor structure may include a packaging substrate, a lid, and a first semiconductor die between the packaging substrate and the lid. The first semiconductor die may have a frontside attached to the packaging substrate that has semiconductor devices. The first semiconductor die may also have a backside, opposite the frontside, that has grooves less than a thickness of the first semiconductor die.

公开(公告)号：US20240234317A9

公开(公告)日：2024-07-11

申请号：US17972892

申请日：2022-10-25

Applicant: International Business Machines Corporation

Inventor： Nikhil Jain ,  Prabudhya Roy Chowdhury ,  Kisik Choi ,  Ruilong Xie

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/48 ,  H01L27/12

CPC classification number: H01L23/5286 ,  H01L21/76898 ,  H01L23/481 ,  H01L27/124 ,  H01L27/1266 ,  H01L21/76224

Abstract: A semiconductor device includes: a channel having layers of silicon separated from each other; a metal gate in contact with the layers of silicon; source/drain regions adjacent to the metal gate; a frontside power rail extending through the layers of silicon; a dielectric separating the frontside power rail from the metal gate; a via-connect buried power rail extending through the dielectric and coupling the frontside power rail to the source/drain regions; and a backside power rail coupled to the frontside power rail. The layers of silicon are wrapped on three sides by the metal gate.

公开(公告)号：US20230369218A1

公开(公告)日：2023-11-16

申请号：US17662859

申请日：2022-05-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Tao Li ,  Devika Sarkar Grant ,  Liqiao Qin ,  Nikhil Jain ,  Prabudhya Roy Chowdhury ,  Sagarika Mukesh ,  Ruilong Xie ,  Kisik Choi

IPC: H01L23/528 ,  H01L21/8234 ,  H01L21/768 ,  H01L23/522 ,  H01L29/786

CPC classification number: H01L23/5286 ,  H01L21/823475 ,  H01L21/76897 ,  H01L23/5226 ,  H01L29/78696 ,  H01L29/0673

Abstract: Embodiments disclosed herein include a semiconductor structure. The semiconductor structure may include a first top transistor comprising a first source/drain (S/D) region and a first bottom transistor with a second S/D region. The first bottom transistor may be stacked directly below the first transistor. The semiconductor structure may also include a backside power delivery network (BSPDN) below the bottom transistor, a back-end-of-line (BEOL) metal level above the top transistor, and a first interlevel via electrically connecting a top of the first S/D region to the BSPDN.