LOW-PROFILE MEMORY APPARATUS COMPATIBLE WITH SYSTEM THERMAL SOLUTIONS AND METHOD FOR MAKING SAME

    公开(公告)号:US20240290680A1

    公开(公告)日:2024-08-29

    申请号:US18115711

    申请日:2023-02-28

    CPC classification number: H01L23/367 H01L21/4871 H01L23/3736

    Abstract: A low-profile memory apparatus that is compatible with system thermal solutions. The apparatus includes a substrate layer with an upper surface and a lower surface, a portion of the substrate layer having a first arrangement of conductive contacts located on the lower surface. A memory package is inverted and attached to the first arrangement of conductive contacts. A heat spreader component comprising a cavity is included. The memory package and the portion of the substrate layer having the first arrangement of conductive contacts located in the cavity. A second arrangement of conductive contacts is located on the lower surface of the substrate layer, external to the heat spreader component, to attach the apparatus to another substrate or printed circuit board in a multi-die assembly.

    TECHNOLOGIES FOR AN ELECTROMAGNETIC INTERFERENCE SHIELD

    公开(公告)号:US20250113428A1

    公开(公告)日:2025-04-03

    申请号:US18478967

    申请日:2023-09-29

    Abstract: Technologies for a shield for electromagnetic interference include a circuit board with an integrated circuit package on it, with a hole in the circuit board under the integrated circuit package. The integrated circuit package may include one or more dies or other components on the underside of the package, at least partially positioned in the hole in the circuit board. An electromagnetic shield box can be positioned in the hole. Tabs of the electromagnetic shield box may interface with pads on the same side of the circuit board as the integrated circuit package. The electromagnetic shield box may prevent or reduce electromagnetic or radiofrequency interference on the components of the integrated circuit package. Positioning the electromagnetic shield box can reduce the overall height of the circuit board, among other advantages.

    MOLDED INTERCONNECT MEMORY ON PACKAGE
    5.
    发明公开

    公开(公告)号:US20230369232A1

    公开(公告)日:2023-11-16

    申请号:US17741988

    申请日:2022-05-11

    Abstract: An electronic system includes a first substrate including first solder bumps on a bottom surface, the first solder bumps having a first solder bump surface opposite from the bottom surface; a processor integrated circuit (IC) die including at least one processor mounted on a top surface of the first substrate; and a companion component to the processor IC. The companion component includes a second substrate, second solder bumps, and third solder bumps. The second solder bumps include a second solder bump surface, and the third solder bumps include a third solder bump surface at a different height than the second solder bump surface. The second solder bump surface contacts the top surface of the first substrate and the third solder bump surface is at a same height as the first solder bump surface.

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