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公开(公告)号:US12124856B2
公开(公告)日:2024-10-22
申请号:US17211549
申请日:2021-03-24
Applicant: Intel Corporation
Inventor: Subrata Banik , Aamir Bohra , Vincent Zimmer , Robert E. Gough , Xiang Ma , Jabeena Begum Gaibusab
IPC: G06F9/4401 , G06F8/65 , G06F15/78 , G06F21/57
CPC classification number: G06F9/4411 , G06F15/7807 , G06F8/65 , G06F9/4401 , G06F21/572
Abstract: During a computing system boot sequence, reference firmware provided by a computing system component supplies Advanced Configuration and Power Interface (ACPI) code that generates ACPI tables and definition blocks to a bootloader. During a boot sequence, the reference firmware receives an indication from the bootloader which components the reference firmware is to initialize. As part of component initialization performed by the reference firmware, the reference firmware populates hand-off data structures (e.g., hand-off blocks (HOBs)) with ACPI code (AML code) that, when executed by the bootloader, generates and populates ACPI tables (e.g., DSDT and SSDT tables) and definition blocks with information pertinent to the initialization and runtime management of computing system components. Component initialization and runtime configuration workarounds can be implemented in the bootloader incorporating reference firmware updates provided by the component vendor.
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公开(公告)号:US11792280B2
公开(公告)日:2023-10-17
申请号:US18067097
申请日:2022-12-16
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Vincent Zimmer , Subrata Banik , Marcos Carranza , Kshitij Arun Doshi , Francesc Guim Bernat , Karthik Kumar
IPC: H04L67/51 , H04L67/562 , H04L41/5009 , H04L9/32 , H04L9/00
CPC classification number: H04L67/51 , H04L9/3278 , H04L41/5009 , H04L67/562 , H04L9/50
Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to: obtain, by a microservice of a service hosted in a datacenter, provisioned credentials for the microservice based on an attestation protocol; generate, for a task performed by the microservice, provenance metadata for the task, the provenance metadata including identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and operating state of a sidecar of the microservice during the task; encrypt the provenance metadata with the provisioned credentials for the microservice; and record the encrypted provenance metadata in a local blockchain of provenance metadata maintained for the hardware resource executing the task and the microservice.
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3.
公开(公告)号:US20230198875A1
公开(公告)日:2023-06-22
申请号:US17556051
申请日:2021-12-20
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Vincent Zimmer , Subrata Banik , Marcos Carranza , Kshitij Arun Doshi , Francesc Guim Bernat , Karthik Kumar
IPC: H04L43/0817 , H04L43/0894 , H04L43/0864 , H04L41/5009 , G06N20/00
CPC classification number: H04L43/0817 , G06N20/00 , H04L41/5009 , H04L43/0864 , H04L43/0894
Abstract: An apparatus to facilitate at-scale telemetry using interactive matrix for deterministic microservices performance is disclosed. The apparatus includes one or more processors to: receive user input comprising an objective or task corresponding to scheduling a microservice for a service, wherein the objective or task may include QoS, SLO, ML feedback; identify interaction matrix components in an interaction matrix that match the objective or tasks for the microservice; identify knowledgebase components in knowledgebase that match the objective or tasks for the microservice; and determine a scheduling operation for the microservice, the scheduling operation to deploy the microservice in a configuration that is in accordance with the objective or task, wherein the configuration comprises a set of hardware devices and microservice interaction points determined based on the interaction matrix components and the knowledgebase components.
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公开(公告)号:US12079612B2
公开(公告)日:2024-09-03
申请号:US17113771
申请日:2020-12-07
Applicant: Intel Corporation
Inventor: Subrata Banik , Vincent Zimmer , Rajaram Regupathy , Ravi Poovalur Rangarajan
IPC: G06F8/65 , G06F9/4401 , G06F9/48 , G06F9/50 , G06F15/78
CPC classification number: G06F8/65 , G06F9/4401 , G06F9/4843 , G06F9/5027 , G06F15/7807
Abstract: Systems, apparatuses and methods may provide for technology that identifies, during a first boot process, whether at least one task associated with at least one software program is set to occur in a single-threaded process or a multithreaded process, in response to the at least one task being set to occur in the multithreaded process, executing the at least one task in the multithreaded process during the first boot process, and in response to the at least one task being set to occur in the single-threaded process, executing the at least one task in the single-threaded process during the first boot process.
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公开(公告)号:US11474579B2
公开(公告)日:2022-10-18
申请号:US16899077
申请日:2020-06-11
Applicant: Intel Corporation
Inventor: Rajaram Regupathy , Peter Ewert , Subrata Banik , Vagdevi P , V Sowmya
IPC: G06F1/26 , G06F9/4401 , G06F21/57 , G06F21/44 , H02J7/00 , G06F1/3212
Abstract: Systems, apparatuses and methods may provide for technology that initiates a boot of a computing system containing an embedded controller while the computing system is in a low power mode, conducts a verification that code to perform the boot is uncorrupted, and negotiates an increased power delivery with a source device connected to the computing system if the verification is successful.
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公开(公告)号:US20210357234A1
公开(公告)日:2021-11-18
申请号:US17390268
申请日:2021-07-30
Applicant: Intel Corporation
Inventor: Subrata Banik , Kunjal Parikh , Rajaram Regupathy , Barnali Sarkar
IPC: G06F9/4401 , G06F1/3234
Abstract: Particular embodiments described herein provide for an electronic device that includes a battery, a display, an embedded controller to determine a battery condition and set an indicator when then battery condition is at a low power state, and a basic input/output system (BIOS), where, before an operating system stage of a boot process, the BIOS sets a brightness of the display at a native brightness if the indicator is not set and sets the brightness of the display at a low power brightness to reduce the brightness of the display if the indicator is set. In an example, the embedded controller sets the indicator before the central processing unit is reset during the boot process.
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公开(公告)号:US20210004241A1
公开(公告)日:2021-01-07
申请号:US17025350
申请日:2020-09-18
Applicant: Intel Corporation
Inventor: Subrata Banik , Maulik V. Vaghela , Rajaram Regupathy , Vincent Zimmer , Asad Azam
IPC: G06F9/4401 , G06F9/30 , G06F12/0811
Abstract: Embodiments are directed to improving boot process for early display initialization and visualization. An embodiment of a system includes a plurality of processor cores; a cache coupled to the plurality of processor cores; and a controller circuit to: initialize a portion of the cache as static memory for hardware initialization code usage before beginning execution of the hardware initialization code after a power on of the hardware processor; and cause initialization of a display device to be performed using the portion of the cache, the initialization of the display device performed independently of initialization of dynamic memory of the hardware processor.
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公开(公告)号:US20230412699A1
公开(公告)日:2023-12-21
申请号:US18456102
申请日:2023-08-25
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Vincent Zimmer , Subrata Banik , Marcos Carranza , Kshitij Arun Doshi , Francesc Guim Bernat , Karthik Kumar
IPC: H04L67/51 , H04L41/5009 , H04L9/32 , H04L67/562
CPC classification number: H04L67/51 , H04L41/5009 , H04L9/3278 , H04L67/562 , H04L9/50
Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to obtain provenance metadata for a microservice from a local blockchain of provenance metadata maintained for the hardware resource executing a task performed by the microservice, the provenance metadata comprising identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and an operating state of a sidecar of the microservice during the task; access one or more policies established for the microservice; analyze the provenance metadata with respect to the one or more policies to identify if there is a violation of the one or more policies; and generate one or more evaluation metrics based on whether the violation of the one or more policies is identified.
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公开(公告)号:US11816220B2
公开(公告)日:2023-11-14
申请号:US17032369
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: Rajaram Regupathy , Subrata Banik , Vincent Zimmer , Saranya Gopal
CPC classification number: G06F21/575 , G06F21/572 , G06F21/79
Abstract: Embodiments are directed to a phased boot process to dynamically initialize devices in a verified environment. An embodiment of a system includes a memory device to store platform initialization firmware to cause the processing system to: initialize, during a boot process, a portion of the one or more memory modules as system management random access memory (SMRAM) for system management mode (SMM) usage; generate an SMM component in the SMRAM, the SMM component comprising an SMM handler routine to handle dynamic intellectual property (IP) management operations corresponding to the plurality of hardware components; register the SMM handler routine with an SMM interrupt (SMI) for identification of SMM events from an operating system (OS); and generate an SMM dispatcher in the SMRAM, the SMM dispatcher to create an instance of the SMM handler routine in the SMRAM in response to receiving an SMI from the OS during runtime of the processing system.
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公开(公告)号:US20230199077A1
公开(公告)日:2023-06-22
申请号:US18067097
申请日:2022-12-16
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Vincent Zimmer , Subrata Banik , Marcos Carranza , Kshitij Arun Doshi , Francesc Guim Bernat , Karthik Kumar
IPC: H04L67/51 , H04L67/562 , H04L41/5009 , H04L9/32
CPC classification number: H04L67/51 , H04L67/562 , H04L41/5009 , H04L9/3278 , H04L9/50
Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to: obtain, by a microservice of a service hosted in a datacenter, provisioned credentials for the microservice based on an attestation protocol; generate, for a task performed by the microservice, provenance metadata for the task, the provenance metadata including identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and operating state of a sidecar of the microservice during the task; encrypt the provenance metadata with the provisioned credentials for the microservice; and record the encrypted provenance metadata in a local blockchain of provenance metadata maintained for the hardware resource executing the task and the microservice.
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