MINIMIZING PRINTED CIRCUIT BOARD WARPAGE
    4.
    发明申请
    MINIMIZING PRINTED CIRCUIT BOARD WARPAGE 审中-公开
    打印印刷电路板最小化

    公开(公告)号:US20140285979A1

    公开(公告)日:2014-09-25

    申请号:US13849580

    申请日:2013-03-25

    CPC classification number: H05K3/4611 H05K2201/09136 H05K2203/068

    Abstract: A printed circuit board and method of manufacturing same, the printed circuit board comprising a stack of layers. The stack of layers being comprised of alternating circuit layers and insulating layers that are laminated together. The stack of layers includes an area with resin cured to a degree. The area has a coefficient of thermal expansion that is dependent, at least in part, on the degree of curing of the resin.

    Abstract translation: 一种印刷电路板及其制造方法,所述印刷电路板包括一叠层。 层叠层由层叠在一起的交替电路层和绝缘层组成。 层叠层包括一定程度固化的树脂区域。 该区域的热膨胀系数至少部分地取决于树脂的固化程度。

Patent Agency Ranking