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    Interleaving apparatuses and memory controllers having the same
    1.
    发明授权
    Interleaving apparatuses and memory controllers having the same 有权
    具有相同的交错装置和存储器控制器

    公开(公告)号：US08812942B2

    公开(公告)日：2014-08-19

    申请号：US12944807

    申请日：2010-11-12

    申请人： Jaehong Kim ,  Hee-Seok Eun ,  Ki-Jun Lee ,  Yong-June Kim

    发明人： Jaehong Kim ,  Hee-Seok Eun ,  Ki-Jun Lee ,  Yong-June Kim

    IPC分类号： G06F11/00

    CPC分类号： G06F12/0607 ,  G06F2212/7208

    摘要： An interleaving apparatus may include a first buffer unit configured to buffer input data in units having a size of a sector to generate sector unit data, an encoding unit configured to encode the sector unit data and generate a plurality of parity codes based on the encoding, a second buffer unit configured to interleave the sector unit data and the parity codes and generate interleaving data based on the interleaving, the second buffer unit including a plurality of output buffers configured to store the interleaving data, and an output unit configured to output the interleaving data.

    摘要翻译： 交错装置可以包括：第一缓冲器单元，被配置为以具有扇区大小的单位缓冲输入数据以产生扇区单元数据;编码单元，被配置为对扇区单元数据进行编码，并且基于编码生成多个奇偶校验码， 第二缓冲器单元，被配置为交织扇区单元数据和奇偶校验码，并且基于交织产生交织数据，第二缓冲单元包括被配置为存储交织数据的多个输出缓冲器，以及输出单元，其被配置为输出交织 数据。

    Memory system to determine interference of a memory cell by adjacent memory cells, and operating method thereof
    3.
    发明授权
    Memory system to determine interference of a memory cell by adjacent memory cells, and operating method thereof 有权
    用于确定相邻存储单元的存储单元的干扰的存储器系统及其操作方法

    公开(公告)号：US08587997B2

    公开(公告)日：2013-11-19

    申请号：US13016063

    申请日：2011-01-28

    申请人： Jaehong Kim ,  Kijun Lee ,  Yong June Kim ,  Heeseok Eun

    发明人： Jaehong Kim ,  Kijun Lee ,  Yong June Kim ,  Heeseok Eun

    IPC分类号： G11C11/34 ,  G11C16/04

    CPC分类号： G11C16/3427 ,  G11C16/26

    摘要： Provided are a memory system and an operating method thereof. The operating method reads an observation memory cell at least one time with different read voltages to configure a first read data symbol, reads a plurality of interference memory cells adjacent to the observation memory cell at least one time with different read voltages to configure second read data symbols, and determines a logical value of the observation memory cell based on the first read data symbol and the second read data symbols.

    摘要翻译： 提供了一种存储器系统及其操作方法。 操作方法用不同的读取电压至少一次读取观察存储器单元以配置第一读取数据符号，至少用不同的读取电压读取与观察存储器单元相邻的多个干扰存储器单元以配置第二读取数据 符号，并且基于第一读取数据符号和第二读取数据符号确定观察存储器单元的逻辑值。

    Storage device and method for reading the same
    4.
    发明授权
    Storage device and method for reading the same 有权
    存储装置及其读取方法

    公开(公告)号：US08422291B2

    公开(公告)日：2013-04-16

    申请号：US12662329

    申请日：2010-04-12

    申请人： Yong June Kim ,  Heeseok Eun ,  Han Woong Yoo ,  Jaehong Kim ,  Hong Rak Son

    发明人： Yong June Kim ,  Heeseok Eun ,  Han Woong Yoo ,  Jaehong Kim ,  Hong Rak Son

    IPC分类号： G11C16/04

    CPC分类号： G11C16/26 ,  G06F11/1048 ,  G11C11/5642 ,  G11C16/0483 ,  G11C29/00

    摘要： The storage device includes a storage unit configured to store data, an error controlling unit configured to correct an error of the data read out from the storage unit according to at least one read level, and a read level controlling unit configured to control the at least one read level when the error is uncorrectable. The read level controlling unit is configured to measure a distribution of memory cells of the storage unit, configured to filter the measured distribution, and configured to reset the at least one read level based on the filtered distribution.

    摘要翻译： 存储装置包括：被配置为存储数据的存储单元;错误控制单元，被配置为根据至少一个读取级别校正从存储单元读出的数据的错误;以及读取级别控制单元，被配置为至少控制 一个读取级别，当错误是不可校正的。 读取级别控制单元被配置为测量存储单元的存储器单元的分布，被配置为过滤所测量的分布，并且被配置为基于滤波的分布来重置所述至少一个读取级别。

    METHOD OF ESTIMATING AND CORRECTING ERRORS IN MEMORY CELLS
    5.
    发明申请
    METHOD OF ESTIMATING AND CORRECTING ERRORS IN MEMORY CELLS 有权
    估计和校正记忆细胞中的错误的方法

    公开(公告)号：US20100115377A1

    公开(公告)日：2010-05-06

    申请号：US12607768

    申请日：2009-10-28

    申请人： Jaehong Kim ,  Yong June Kim ,  Seung Hwan Song

    发明人： Jaehong Kim ,  Yong June Kim ,  Seung Hwan Song

    IPC分类号： H03M13/05 ,  G06F11/10

    CPC分类号： H03M13/1108 ,  G06F11/1072

    摘要： A method, implemented by at least an error correction code (ECC) decoder and a controller, estimates and corrects errors in memory cells. The method includes identifying a first candidate group of memory cells having an error-generation possibility using a first method for error estimation; identifying a second candidate group of memory cells having an error-generation possibility using a second method for error estimation; and correcting errors in at least one cell commonly included in the first and second candidate groups.

    摘要翻译： 至少由纠错码（ECC）解码器和控制器实施的方法估计和校正存储器单元中的错误。 该方法包括使用第一种误差估计方法来识别具有错误产生可能性的存储器单元的第一候选组; 使用用于错误估计的第二方法识别具有错误生成可能性的第二候选组存储器单元; 以及校正通常包括在第一和第二候选组中的至少一个单元中的错误。

    Storage device and method for reading the same
    7.
    发明申请
    Storage device and method for reading the same 有权
    存储装置及其读取方法

    公开(公告)号：US20100302850A1

    公开(公告)日：2010-12-02

    申请号：US12662329

    申请日：2010-04-12

    申请人： Yong June Kim ,  Heeseok Eun ,  Han Woong Yoo ,  Jaehong Kim ,  Hong Rak Son

    发明人： Yong June Kim ,  Heeseok Eun ,  Han Woong Yoo ,  Jaehong Kim ,  Hong Rak Son

    IPC分类号： G11C16/06 ,  G11C7/10 ,  G11C16/04

    CPC分类号： G11C16/26 ,  G06F11/1048 ,  G11C11/5642 ,  G11C16/0483 ,  G11C29/00

    摘要： The storage device includes a storage unit configured to store data, an error controlling unit configured to correct an error of the data read out from the storage unit according to at least one read level, and a read level controlling unit configured to control the at least one read level when the error is uncorrectable. The read level controlling unit is configured to measure a distribution of memory cells of the storage unit, configured to filter the measured distribution, and configured to reset the at least one read level based on the filtered distribution.

    摘要翻译： 存储装置包括：被配置为存储数据的存储单元;错误控制单元，被配置为根据至少一个读取级别校正从存储单元读出的数据的错误;以及读取级别控制单元，被配置为至少控制 一个读取级别，当错误是不可校正的。 读取级别控制单元被配置为测量存储单元的存储器单元的分布，被配置为过滤所测量的分布，并且被配置为基于滤波的分布来重置所述至少一个读取级别。

    NONVOLATILE MEMORY DEVICE AND METHOD SYSTEM INCLUDING THE SAME
    8.
    发明申请
    NONVOLATILE MEMORY DEVICE AND METHOD SYSTEM INCLUDING THE SAME 审中-公开
    非易失性存储器件和包括其的方法系统

    公开(公告)号：US20100238705A1

    公开(公告)日：2010-09-23

    申请号：US12698720

    申请日：2010-02-02

    申请人： Yong June Kim ,  Jaehong Kim ,  Junjin Kong

    发明人： Yong June Kim ,  Jaehong Kim ,  Junjin Kong

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C7/1006 ,  G11C7/1042 ,  G11C8/10 ,  G11C11/5628 ,  G11C11/5678 ,  G11C13/00 ,  G11C13/0004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2211/5623

    摘要： A nonvolatile memory device performs interleaving of data to be stored in each wordline (memory page), or of data to be stored in multiple wordlines (memory pages). The NVM includes a memory cell array, a storage circuit of a de-interleaving circuit, and a read/write circuit. The storage circuit of the de-interleaving circuit is configured to store program data to be written interleaved into the memory cell array. The read/write circuit is configured to control the interleaved/deinterleaved data input/output between the memory cell array and the storage circuit. The write operation unit size may be the same or different from the read operation unit size. The storage circuit stores the program data of integer k times of a common divisor of a read operation unit size and a write operation unit size of the read/write circuit, wherein k may equal ‘m’ (the number of bits stored in each memory cell of the NVM).

    摘要翻译： 非易失性存储器件执行要存储在每个字线（存储器页）中的数据或要存储在多个字线（存储器页）中的数据的交织。 NVM包括存储单元阵列，解交织电路的存储电路和读/写电路。 解交织电路的存储电路被配置为将要被交织的程序数据存储到存储单元阵列中。 读/写电路被配置为控制存储单元阵列和存储电路之间的交错/去交织的数据输入/输出。 写入操作单元尺寸可以与读取操作单元尺寸相同或不同。 存储电路存储读/写电路的读操作单元大小和写操作单元大小的公约数的整数k倍的程序数据，其中k可以等于“m”（存储在每个存储器中的位数 NVM的单元）。