公开(公告)号：US09046727B2

公开(公告)日：2015-06-02

申请号：US12414932

申请日：2009-03-31

申请人： Kwang-Ho Lee ,  Jang-Soo Kim ,  Hong-Suk Yoo ,  Sang-Soo Kim ,  Shi-Yul Kim ,  Jae-Hyoung Youn

发明人： Kwang-Ho Lee ,  Jang-Soo Kim ,  Hong-Suk Yoo ,  Sang-Soo Kim ,  Shi-Yul Kim ,  Jae-Hyoung Youn

IPC分类号： H01L33/00 ,  H01L21/28 ,  G02F1/1362 ,  G02F1/1339 ,  H01L27/12

CPC分类号： H01L27/124 ,  G02F1/13394 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/1248 ,  H01L27/1262

摘要： A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.

摘要翻译： 薄膜晶体管（“TFT”）阵列面板包括： 绝缘基板，设置在所述绝缘基板上并包括漏电极的TFT，覆盖所述TFT的钝化层，并且包括设置在其中的所述漏电极对应的接触部分，所述隔板包括设置在所述钝化层上的有机材料，并且包括 横向部分，纵向部分和设置在漏电极上的接触部分，设置在钝化层上并设置在由隔板限定的区域中的滤色器，设置在隔板上的有机覆盖层和滤色器，以及 设置在所述有机覆盖层上的像素电极，并且通过所述钝化层的接触部分和所述隔离物的接触部分连接到所述漏电极，其中在所述有机覆盖层中形成接触孔，所述接触孔对应于所述钝化层的接触部分 钝化层。

公开(公告)号：US08604478B2

公开(公告)日：2013-12-10

申请号：US13168769

申请日：2011-06-24

申请人： Hye-Young Ryu ,  Jang-Soo Kim ,  Su-Hyoung Kang

发明人： Hye-Young Ryu ,  Jang-Soo Kim ,  Su-Hyoung Kang

IPC分类号： H01L29/04

CPC分类号： G02F1/136227 ,  G02F2001/136222 ,  H01L27/3258

摘要： In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.

摘要翻译： 在薄膜晶体管（TFT）基板中，栅极绝缘层设置在与栅极线电连接的栅电极上。 半导体层设置在栅极绝缘层上。 源极电极与与栅极线相交的数据线电连接。 漏电极面对源电极并限定半导体层的沟道面积。 有机层设置在数据线上，并且具有暴露通道区域的第一开口。 无机绝缘层设置在有机层上。 像素电极设置在无机绝缘层上并与漏电极电连接。 无机绝缘层覆盖第一开口，无机绝缘层的厚度基本均匀。

公开(公告)号：US08598581B2

公开(公告)日：2013-12-03

申请号：US12434907

申请日：2009-05-04

申请人： Jang-Soo Kim ,  Jae-Hyoung Youn ,  Sang-Soo Kim ,  Dong-Gyu Kim

发明人： Jang-Soo Kim ,  Jae-Hyoung Youn ,  Sang-Soo Kim ,  Dong-Gyu Kim

IPC分类号： H01L33/00

CPC分类号： H01L29/78633 ,  H01L27/124 ,  H01L27/1248

摘要： A method for manufacturing a thin film transistor array panel includes; forming a gate line including a gate electrode and a height increasing member on a substrate, forming a gate insulating layer on the gate line and the height increasing member, forming a semiconductor, a data line including a source electrode, and a drain electrode facing the source electrode and overlapping at least a portion of the height increasing member on the gate insulating layer, forming a first insulating layer on the gate insulating layer, a data line and the drain electrode, forming a light-blocking member on a portion of the first insulating layer corresponding to the gate line and the data line, forming a color filter in an area bound by the light-blocking member, forming a second insulating layer on the light-blocking member and the color filter, and patterning the second insulating layer, the light-blocking member or the color filter, and the first insulating layer to form a contact hole exposing a portion of the drain electrode aligned with the height increasing member.

摘要翻译： 薄膜晶体管阵列板的制造方法包括： 在基板上形成包括栅电极和高度增加部件的栅极线，在栅极线和高度增加部件上形成栅绝缘层，形成半导体，包括源电极和漏电极的数据线， 并且在所述栅极绝缘层上与所述高度增加部件的至少一部分重叠，在所述栅极绝缘层上形成第一绝缘层，在所述栅极绝缘层上形成第一绝缘层，在所述栅极绝缘层上形成阻挡部件，在所述第一 对应于栅极线和数据线的绝缘层，在由阻光构件限定的区域中形成滤色器，在遮光构件和滤色器上形成第二绝缘层，并对第二绝缘层进行构图， 遮光构件或滤色器，以及第一绝缘层，以形成暴露与高度增加构件对准的漏电极的一部分的接触孔。

公开(公告)号：US08289462B2

公开(公告)日：2012-10-16

申请号：US13238788

申请日：2011-09-21

申请人： Young-Wook Lee ,  Jang-Soo Kim

发明人： Young-Wook Lee ,  Jang-Soo Kim

IPC分类号： G02F1/136

CPC分类号： H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1365 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2001/13629 ,  H01L27/1248

摘要： A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

摘要翻译： 薄膜晶体管阵列面板包括基板; 形成在所述基板上的多条栅极线; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 形成在栅极线，数据线和薄膜晶体管的上部的多个滤色器; 形成在滤色器上并且包括透明导体的公共电极; 钝化层，其形成在所述公共电极的上部; 以及形成在钝化层的上部并且连接到每个薄膜晶体管的漏电极的多个像素电极。

公开(公告)号：US08111343B2

公开(公告)日：2012-02-07

申请号：US12361511

申请日：2009-01-28

申请人： Young-Wook Lee ,  Gug-Rae Jo ,  Jang-Soo Kim ,  Jae-Hyoung Youn ,  Byoung-Joo Kim ,  Min-Uk Kim ,  Kyoung-Keun Son

发明人： Young-Wook Lee ,  Gug-Rae Jo ,  Jang-Soo Kim ,  Jae-Hyoung Youn ,  Byoung-Joo Kim ,  Min-Uk Kim ,  Kyoung-Keun Son

IPC分类号： G02F1/136 ,  G02F1/1335 ,  G02F1/1343

CPC分类号： G02F1/136286 ,  G02F1/133514 ,  G02F2001/136222 ,  G02F2201/40

摘要： A display substrate includes a plurality of color filters formed on a base substrate, a gate line formed in a trench defined by at least one of the color filters and extended along a first direction, an insulation layer formed on the color filters and the gate line, a data line formed on the insulation layer to be extended along a second direction crossing the first direction, and pixel electrodes formed on the base substrate having the data line formed thereon.

摘要翻译： 显示基板包括形成在基底基板上的多个滤色器，形成在由至少一个滤色器限定的沟槽中并沿着第一方向延伸的沟槽的栅极线，形成在滤色器上的绝缘层和栅极线 形成在沿着与第一方向交叉的第二方向延伸的绝缘层上的数据线以及形成在其上形成有数据线的基底基板上的像素电极。

公开(公告)号：US08045080B2

公开(公告)日：2011-10-25

申请号：US12548897

申请日：2009-08-27

申请人： Young-Wook Lee ,  Jang-Soo Kim

发明人： Young-Wook Lee ,  Jang-Soo Kim

IPC分类号： G02F1/136

CPC分类号： H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1365 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2001/13629 ,  H01L27/1248

摘要： A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

摘要翻译： 薄膜晶体管阵列面板包括基板; 形成在所述基板上的多条栅极线; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 形成在栅极线，数据线和薄膜晶体管的上部的多个滤色器; 形成在滤色器上并且包括透明导体的公共电极; 钝化层，其形成在所述公共电极的上部; 以及形成在钝化层的上部并且连接到每个薄膜晶体管的漏电极的多个像素电极。

公开(公告)号：US20110254007A1

公开(公告)日：2011-10-20

申请号：US13168769

申请日：2011-06-24

申请人： Hye-Young RYU ,  Jang-Soo Kim ,  Su-Hyoung Kang

发明人： Hye-Young RYU ,  Jang-Soo Kim ,  Su-Hyoung Kang

IPC分类号： H01L33/08

CPC分类号： G02F1/136227 ,  G02F2001/136222 ,  H01L27/3258

摘要： In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.

摘要翻译： 在薄膜晶体管（TFT）基板中，栅极绝缘层设置在与栅极线电连接的栅电极上。 半导体层设置在栅极绝缘层上。 源极电极与与栅极线相交的数据线电连接。 漏电极面对源电极并限定半导体层的沟道面积。 有机层设置在数据线上，并且具有暴露通道区域的第一开口。 无机绝缘层设置在有机层上。 像素电极设置在无机绝缘层上并与漏电极电连接。 无机绝缘层覆盖第一开口，无机绝缘层的厚度基本均匀。

公开(公告)号：US08013945B2

公开(公告)日：2011-09-06

申请号：US12005904

申请日：2007-12-27

申请人： Kyoung-Ju Shin ,  Shi-Yul Kim ,  Hye-Young Ryu ,  Mee-Hye Jung ,  Jang-Soo Kim ,  Su-Hyoung Kang

发明人： Kyoung-Ju Shin ,  Shi-Yul Kim ,  Hye-Young Ryu ,  Mee-Hye Jung ,  Jang-Soo Kim ,  Su-Hyoung Kang

IPC分类号： G02F1/1343 ,  H01L29/04

CPC分类号： G02F1/136209 ,  G02F1/133512 ,  G02F1/133707 ,  G02F1/136286 ,  G02F2001/136222

摘要： A display substrate includes a gate line, a gate insulating layer, a data line, a thin-film transistor (TFT), a storage line, a passivation layer, a color filter layer, a pixel electrode, a first light-blocking layer and a second light-blocking layer. The storage line includes the same material as the gate line. The passivation layer covers the data line. The color filter layer is formed on the passivation layer. The pixel electrode is formed on the color filter layer in each pixel. The first light-blocking layer is formed between adjacent pixel electrodes, and includes the same material as the gate line. The second light-blocking layer is formed between the first light-blocking layer, and includes the same material as the data line. Therefore, an aperture ratio may be increased.

摘要翻译： 显示基板包括栅极线，栅极绝缘层，数据线，薄膜晶体管（TFT），存储线，钝化层，滤色器层，像素电极，第一遮光层和 第二遮光层。 存储线包括与栅极线相同的材料。 钝化层覆盖数据线。 滤色层在钝化层上形成。 像素电极形成在每个像素中的滤色器层上。 第一遮光层形成在相邻的像素电极之间，并且包括与栅极线相同的材料。 第二遮光层形成在第一遮光层之间，并且包括与数据线相同的材料。 因此，可以增加开口率。

公开(公告)号：US20110159622A1

公开(公告)日：2011-06-30

申请号：US13042348

申请日：2011-03-07

申请人： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

发明人： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

IPC分类号： H01L33/62

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

摘要： Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

摘要翻译： 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。

公开(公告)号：US07923732B2

公开(公告)日：2011-04-12

申请号：US12331361

申请日：2008-12-09

申请人： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

发明人： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

IPC分类号： H01L29/00

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

摘要： Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

摘要翻译： 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。