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47 条记录 (耗时 0.052 秒)

    LIGHT-EMITTING DIODE PACKAGE
    3.
    发明申请
    LIGHT-EMITTING DIODE PACKAGE 审中-公开
    发光二极管封装

    公开(公告)号：US20120061695A1

    公开(公告)日：2012-03-15

    申请号：US13258811

    申请日：2010-03-23

    申请人： Kang Kim

    发明人： Kang Kim

    IPC分类号： H01L27/15 ,  H01L33/64 ,  H01L33/62

    CPC分类号： H01L33/641 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/19107 ,  H05K1/0203 ,  H05K3/0061 ,  H05K2201/10106 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A light emitting diode (LED) package is provided. The LED package includes: a package body including an LED; a bottom heat transfer metal layer formed on the bottom of the package body; and a metal plate bonded to the bottom heat transfer metal layer, wherein the bottom heat transfer metal layer is bonded to the metal plate through soldering or an adhesive such as Ag epoxy, and the metal plate includes only metal without a resin layer.

    摘要翻译： 提供了一种发光二极管（LED）封装。 LED封装包括：包括LED的封装体; 形成在封装体的底部的底部传热金属层; 和结合到底部传热金属层的金属板，其中底部传热金属层通过焊接或诸如Ag环氧树脂的粘合剂结合到金属板，并且金属板仅包括没有树脂层的金属。

    Methods and systems for measuring mechanical property of a vascular wall and method and system for determining health of a vascular structure
    4.
    发明授权
    Methods and systems for measuring mechanical property of a vascular wall and method and system for determining health of a vascular structure 有权
    用于测量血管壁的机械性能的方法和系统，以及用于确定血管结构健康的方法和系统

    公开(公告)号：US07318804B2

    公开(公告)日：2008-01-15

    申请号：US10731302

    申请日：2003-12-09

    申请人： William F. Weitzel ,  Kang Kim ,  Matthew O'Donnell ,  Jonathan M. Rubin ,  Hua Xie ,  Xunchang Chen

    发明人： William F. Weitzel ,  Kang Kim ,  Matthew O'Donnell ,  Jonathan M. Rubin ,  Hua Xie ,  Xunchang Chen

    IPC分类号： A61B8/00

    CPC分类号： A61B8/485 ,  A61B8/08

    摘要： Methods and systems for measuring mechanical property of a vascular wall and a method and system for determining health of a vascular structure are provided wherein local deformation of a vessel wall resulting from physiologic pressures with altered transmural forces is measured. A non-invasive free-hand ultrasound scanning-procedure was performed to apply external force, comparable to the force generated in measuring a subject's blood pressure, to achieve higher strains by equalizing the internal arterial baseline pressure. When the applied pressure matched the internal baseline diastolic pressure, strain and strain rate increased by a factor of 10 over a cardiac cycle. Radial arterial strain was assessed in the vessel wall over the entire deformation procedure using a phase-sensitive, two-dimensional speckle-tracking algorithm. An elastic modulus reconstruction procedure was developed to estimate the non-linear elastic properties of the vascular wall.

    摘要翻译： 提供了用于测量血管壁的机械性能的方法和系统以及用于确定血管结构健康的方法和系统，其中测量由具有改变的透壁力的生理压力引起的血管壁的局部变形。 进行非侵入性自由手超声扫描程序以施加外力，与测量受试者血压时产生的力相当，以通过平衡内部动脉基线压力来实现更高的应变。 当施加的压力与内部基线舒张压相匹配时，应变和应变率在心脏周期上增加10倍。 使用相敏二维斑点跟踪算法，在整个变形过程的血管壁中评估径向动脉应变。 开发弹性模量重建程序来估计血管壁的非线性弹性性质。

    DLL phase detection using advanced phase equal
    5.
    发明申请
    DLL phase detection using advanced phase equal 有权
    DLL相位检测使用高级相位相等

    公开(公告)号：US20050262373A1

    公开(公告)日：2005-11-24

    申请号：US10848261

    申请日：2004-05-18

    申请人： Kang Kim

    发明人： Kang Kim

    IPC分类号： H03L7/081 ,  H03L7/085 ,  G06F1/12

    CPC分类号： H03L7/0814 ,  H03L7/085

    摘要： A system and method are disclosed to generate and terminate clock shift modes during initialization of a synchronous circuit (e.g., a delay-locked loop or DLL). Upon initialization, the DLL is entered into a ForceSL (Force Shift Left) mode and an On1x mode (i.e., left shifting on each clock cycle). The feedback clock that tracks the phase of the reference clock (which, in turn, is derived from the system clock) is initially delayed in a coarse phase detector prior to applying it to the coarse phase detection window. Two delayed versions of the feedback clock are sampled by the reference clock to generate a pair of phase information signals, which are then used to establish an advanced phase equal (APHEQ) signal. The APHEQ signal advances onset of the PHEQ (phase equalization) phase and is used to terminate the ForceSL and On1x modes, thereby preventing wrong ForceSL exit due to clock jitter or feedback path overshooting during On1x exit. The avoidance of wrong ForceSL exit and On1x overshooting problems further results in faster DLL locking time.

    摘要翻译： 公开了一种在同步电路（例如延迟锁定环或DLL）的初始化期间产生和终止时钟移位模式的系统和方法。 在初始化时，DLL进入ForceSL（左移强制）模式和一个1 x模式（即在每个时钟周期左移）。 在将粗略相位检测器应用于粗略相位检测窗口之前，跟踪基准时钟的相位（反过来来自系统时钟）的反馈时钟最初在粗略相位检测器中被延迟。 反馈时钟的两个延迟版本由参考时钟采样，以产生一对相位信息信号，然后将其用于建立高级相位相等（APHEQ）信号。 APHEQ信号提前启动PHEQ（相位均衡）阶段，并用于终止ForceSL和On 1 x模式，从而防止在On 1 x退出时由于时钟抖动或反馈路径过冲引起的错误的ForceSL退出。 避免错误的ForceSL退出和On 1 x超调问题进一步导致更快的DLL锁定时间。

    Method and apparatus for high resolution ZQ calibration
    7.
    发明申请
    Method and apparatus for high resolution ZQ calibration 有权
    用于高分辨率ZQ校准的方法和装置

    公开(公告)号：US20070200591A1

    公开(公告)日：2007-08-30

    申请号：US11299888

    申请日：2005-12-12

    申请人： Kang Kim

    发明人： Kang Kim

    IPC分类号： H03K17/16

    CPC分类号： H03K19/0005 ,  H04L25/0278

    摘要： A method is disclosed for controlling an output impedance of an electronic device of the type having an impedance control terminal to which an external load is to be connected such that a predetermined value of the voltage at the impedance control terminal controls the output impedance of the device. The method is comprised of comparing a reference voltage to a voltage at the impedance control terminal. A variable count signal representing a count value is produced in response to the comparing. The impedance of a variable impedance circuit is varied in response to the count signal, wherein the impedance of the variable impedance circuit controls the voltage at the impedance control terminal. A device connected in parallel with the variable impedance circuit is periodically operated to change (increase/decrease) the impedance of the variable impedance circuit. An apparatus for performing the method is also disclosed. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

    摘要翻译： 公开了一种用于控制具有要连接外部负载的阻抗控制端子的类型的电子设备的输出阻抗的方法，使得阻抗控制端子处的电压的预定值控制该设备的输出阻抗 。 该方法包括将参考电压与阻抗控制端子处的电压进行比较。 响应于比较而产生表示计数值的可变计数信号。 可变阻抗电路的阻抗响应于计数信号而变化，其中可变阻抗电路的阻抗控制阻抗控制端子处的电压。 周期性地操作与可变阻抗电路并联连接的装置，以改变（增加/减少）可变阻抗电路的阻抗。 还公开了一种用于执行该方法的装置。

    Continuous high-frequency event filter
    8.
    发明申请
    Continuous high-frequency event filter 有权
    连续高频事件滤波器

    公开(公告)号：US20070194821A1

    公开(公告)日：2007-08-23

    申请号：US11360093

    申请日：2006-02-22

    申请人： Tyler Gomm ,  Kang Kim

    发明人： Tyler Gomm ,  Kang Kim

    IPC分类号： H03L7/06

    CPC分类号： H03L7/0814 ,  G06F7/62 ,  G11C7/22 ,  G11C7/222 ,  H03L7/0805 ,  H03L7/085 ,  H03L7/089

    摘要： A circuit and method for generating an active output signal in response to detecting N events, which are represented by an event signal. A counter circuit is configured to increment and decrement through a sequence of values in response to the event signal. Detection logic coupled to the counter circuit is configured to detect at least first and second values of the sequence. The detection logic is further configured to generate the active output signal and switch to detecting the second value in response to detecting the first value and generate the active output signal and switch to detecting the first value in response to detecting the second value. The first and second values are separated by N counts.

    摘要翻译： 一种用于响应于由事件信号表示的N个事件来产生有效输出信号的电路和方法。 计数器电路被配置为响应于事件信号递增和递减一系列值。 耦合到计数器电路的检测逻辑被配置为检测序列的至少第一和第二值。 检测逻辑还被配置为产生有效输出信号并且响应于检测到第一值而切换到检测第二值，并且产生有效输出信号并且响应于检测到第二值而切换到检测第一值。 第一个值和第二个值用N个数值分隔。

    Wavelength tunable light source
    9.
    发明申请
    Wavelength tunable light source 审中-公开
    波长可调光源

    公开(公告)号：US20070133649A1

    公开(公告)日：2007-06-14

    申请号：US11634277

    申请日：2006-12-05

    申请人： Oh Kwon ,  Kang Kim ,  Jonghoi Kim ,  Eundeok Sim ,  Kwang Oh

    发明人： Oh Kwon ,  Kang Kim ,  Jonghoi Kim ,  Eundeok Sim ,  Kwang Oh

    IPC分类号： H01S3/08

    CPC分类号： H01S5/141 ,  G02B6/29326 ,  G02B6/29328 ,  G02B6/29395 ,  H01S3/1075 ,  H01S5/02248 ,  H01S5/026 ,  H01S5/06255

    摘要： Provided is a wavelength tunable light source including a semiconductor optical amplifier, a beam steering unit or a beam deflector, and a concave diffraction grating integrated therein. The wavelength tunable light source can be easily implemented since locations to which a beam is diffracted by the concave diffraction grating and at which portions of the beam with different wavelengths have constructive interference form a straight line, not a Rowland circle. Furthermore, wavelength tuning and optical coupling characteristics of the wavelength tunable light source are excellent. Since both single integration and hybrid integration are possible for the wavelength tunable light source, the wavelength tunable light source exhibits superior operating characteristics and high reliability.

    摘要翻译： 提供了包括半导体光放大器，光束转向单元或光束偏转器的波长可调光源以及集成在其中的凹衍射光栅。 波长可调谐光源可以容易地实现，因为光束被凹衍射光栅衍射的位置和具有不同波长的光束的部分具有相长的干涉形成直线而不是罗兰圆。 此外，波长可调光源的波长调谐和光耦合特性优异。 由于单一集成和混合集成对于波长可调谐光源是可能的，所以波长可调光源表现出优异的操作特性和高可靠性。

    Comparator circuit
    10.
    发明申请
    Comparator circuit 有权

    公开(公告)号：US20070120581A1

    公开(公告)日：2007-05-31

    申请号：US11288717

    申请日：2005-11-29

    申请人： Kang Kim

    发明人： Kang Kim

    IPC分类号： H03K5/22

    CPC分类号： H03K5/249 ,  G01R19/16571 ,  H03K3/037 ,  H03K5/2481

    摘要： An improved comparator circuit and associated methods are disclosed. In one embodiment, the comparator circuit comprises two voltage-to-time converter circuits, one for each input voltage to be compared, and an arbiter circuit for receiving the time-converted output of each converter. Each converter assesses the magnitude of its input voltage, and outputs a signal that is asserted at a time in inverse proportion to the magnitude of the input voltage. In one embodiment, producing the output signal at the asserted time comprises using the input voltage to gate a transistor whose discharge rate dictates the timing of the output signal. The two output signals arrive at an arbiter circuit whose function is to determine which output arrived at the arbiter first, as is indicative of the higher magnitude input voltage, and to set the output of the comparator accordingly.