Apparatus for interfacing buses
    5.
    发明授权
    Apparatus for interfacing buses 失效
    用于连接总线的装置

    公开(公告)号:US06182180B2

    公开(公告)日:2001-01-30

    申请号:US08942382

    申请日:1997-10-01

    IPC分类号: G06F1300

    摘要: A method and apparatus for interfacing buses includes a system interface processor coupled to a first bus and including a command register accessible via a second bus. A request buffer and a response buffer are provided which are accessible via the second bus and coupled to the interface processor. The request buffer can be used to store information to be transmitted from the second bus to the first via the interface processor while the response buffer can be used to store information to be transmitted from the first bus to the second bus via the interface processor. The interface processor may include a status register to indicate the status of the interface controller. The interface controller may also include a command register to receive commands transmitted over the second bus.

    摘要翻译: 用于接口总线的方法和装置包括耦合到第一总线并包括经由第二总线可访问的命令寄存器的系统接口处理器。 提供了可通过第二总线访问并耦合到接口处理器的请求缓冲器和响应缓冲器。 请求缓冲器可以用于存储要通过接口处理器从第二总线发送到第一总线的信息,而响应缓冲器可以用于存储要经由接口处理器从第一总线发送到第二总线的信息。 接口处理器可以包括状态寄存器以指示接口控制器的状态。 接口控制器还可以包括用于接收通过第二总线发送的命令的命令寄存器。