公开(公告)号：US08927879B2

公开(公告)日：2015-01-06

申请号：US12952152

申请日：2010-11-22

申请人： Jinwoo Choi ,  Sungjun Chun ,  Jason L. Frankel ,  Paul R. Walling ,  Roger D. Weekly

发明人： Jinwoo Choi ,  Sungjun Chun ,  Jason L. Frankel ,  Paul R. Walling ,  Roger D. Weekly

IPC分类号： H05K1/11 ,  H05K3/02 ,  H05K1/02

CPC分类号： H05K1/0224 ,  G06F17/5081 ,  H05K1/116 ,  H05K2201/09681 ,  H05K2201/09718 ,  H05K2201/09727 ,  Y10T29/49004 ,  Y10T29/49155 ,  Y10T29/53022

摘要： A first selection of mesh line segments of a mesh layer are of a first width and a second selection of mesh line segments of the mesh layer are of a second width, wherein the second width is greater than the first width. The second selection of mesh line segments of the second width are positioned in parallel to a selection of signal lines in a signal layer that are likely to introduce crosstalk, wherein the widening of the mesh line segments shadowing the selection of signal lines increases the likelihood that the return current associated with the signal will flow in the wider mesh line segment, thereby increasing the likelihood of containing the electromagnetic fields associated with the signal such that crosstalk to other signals is reduced or contained.

摘要翻译： 网格层的网格线段的第一选择是第一宽度，并且网格层的网格线段的第二选择具有第二宽度，其中第二宽度大于第一宽度。 第二宽度的网格线段的第二选择与信号层中可能引入串扰的信号线的选择平行地布置，其中遮蔽信号线选择的网线段的加宽增加了 与信号相关联的返回电流将在更宽的网格线段中流动，从而增加了包含与信号相关联的电磁场的可能性，使得与其他信号的串扰减少或包含。

公开(公告)号：US20120125677A1

公开(公告)日：2012-05-24

申请号：US12952152

申请日：2010-11-22

申请人： Jinwoo Choi ,  Sungjun Chun ,  Jason L. Frankel ,  Paul R. Walling ,  Roger D. Weekly

发明人： Jinwoo Choi ,  Sungjun Chun ,  Jason L. Frankel ,  Paul R. Walling ,  Roger D. Weekly

IPC分类号： H05K1/11 ,  H05K3/10

CPC分类号： H05K1/0224 ,  G06F17/5081 ,  H05K1/116 ,  H05K2201/09681 ,  H05K2201/09718 ,  H05K2201/09727 ,  Y10T29/49004 ,  Y10T29/49155 ,  Y10T29/53022

摘要： A first selection of mesh line segments of a mesh layer are of a first width and a second selection of mesh line segments of the mesh layer are of a second width, wherein the second width is greater than the first width. The second selection of mesh line segments of the second width are positioned in parallel to a selection of signal lines in a signal layer that are likely to introduce crosstalk, wherein the widening of the mesh line segments shadowing the selection of signal lines increases the likelihood that the return current associated with the signal will flow in the wider mesh line segment, thereby increasing the likelihood of containing the electromagnetic fields associated with the signal such that crosstalk to other signals is reduced or contained.

摘要翻译： 网格层的网格线段的第一选择是第一宽度，并且网格层的网格线段的第二选择具有第二宽度，其中第二宽度大于第一宽度。 第二宽度的网格线段的第二选择与信号层中可能引入串扰的信号线的选择平行地布置，其中遮蔽信号线选择的网线段的加宽增加了 与信号相关联的返回电流将在更宽的网格线段中流动，从而增加了包含与信号相关联的电磁场的可能性，使得与其他信号的串扰减少或包含。

公开(公告)号：US08325490B2

公开(公告)日：2012-12-04

申请号：US12823316

申请日：2010-06-25

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： H05K1/11

CPC分类号： G06F17/5077 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/0253 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49117 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322

摘要： Manufacturing circuits with reference plane voids over vias with a strip segment interconnect permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.

摘要翻译： 具有带状段互连的通孔上的参考平面空隙的制造电路允许在通孔上路由关键信号路径，同时仅通过插入电容略微增加。 传输线参考平面定义了通过刚性衬底芯的信号承载电镀通孔（PTH）上方（或下方）的空隙，使得信号不会被阻抗失配降级，否则会由分流电容引起 信号承载PTH的顶部（或底部）到传输线参考平面。 为了提供增加的布线密度，信号路径被布置在空隙上，但是通过将导电条包括通过空隙来防止由空隙引起的信号路径的破坏，从而减小与信号承载PTH的耦合并维持 信号路径导体。

公开(公告)号：US08638567B2

公开(公告)日：2014-01-28

申请号：US13603732

申请日：2012-09-05

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： H05K1/11

CPC分类号： G06F17/5077 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/0253 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49117 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322

摘要： Manufacturing circuits with reference plane voids over vias with a strip segment interconnect permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.

公开(公告)号：US20120331430A1

公开(公告)日：2012-12-27

申请号：US13603761

申请日：2012-09-05

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/0253 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49117 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322

摘要： Manufacturing circuits with reference plane voids over vias with a strip segment interconnect permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.

公开(公告)号：US20100035426A1

公开(公告)日：2010-02-11

申请号：US12579517

申请日：2009-10-15

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： H01L21/768 ,  G06F17/50

CPC分类号： H01L21/76879 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/3011 ,  H05K1/0253 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/09536 ,  H05K2201/09627 ,  H05K2201/0969 ,  H01L2224/0401

摘要： An integrated circuit substrate is designed and fabricated with a selectively applied transmission line reference plane metal layer to achieve signal path shielding and isolation, while avoiding drops in impedance due to capacitance between large diameter vias and the transmission line reference plane metal layer. The transmission line reference plane defines voids above (or below) the signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. For voltage-plane bearing PTHs, no voids are introduced, so that signal path conductors can be routed above or adjacent to the voltage-plane bearing PTHs, with the transmission line reference plane preventing shunt capacitance between the signal path conductors and the PTHs.

摘要翻译： 集成电路衬底被设计和制造，具有选择性地施加的传输线参考平面金属层，以实现信号路径屏蔽和隔离，同时避免由于大直径通孔和传输线参考平面金属层之间的电容引起的阻抗下降。 传输线参考平面定义穿过刚性衬底芯的信号承载电镀通孔（PTH）上方（或下方）的空隙，使得信号不会由于并联电容引起的阻抗失配而降级 从信号承载PTH的顶部（或底部）到传输线参考平面。 对于电压平面轴承PTH，不引入空隙，使得信号路径导体可以路由在电压平面轴承PTH上方或附近，传输线参考平面防止信号路径导体和PTH之间的分流电容。

公开(公告)号：US07646082B2

公开(公告)日：2010-01-12

申请号：US11751786

申请日：2007-05-22

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： H01L29/40 ,  H01L29/73 ,  H01L23/52

CPC分类号： H01L21/76879 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/3011 ,  H05K1/0253 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/09536 ,  H05K2201/09627 ,  H05K2201/0969 ,  H01L2224/0401

摘要： A multi-layer circuit substrate and method having improved transmission line integrity and increased routing density uses a selectively applied transmission line reference plane metal layer to achieve signal path shielding and isolation, while avoiding drops in impedance due to capacitance between large diameter vias and the transmission line reference plane metal layer. The transmission line reference plane defines voids above (or below) the signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. For voltage-plane bearing PTHs, no voids are introduced, so that signal path conductors can be routed above or adjacent to the voltage-plane bearing PTHs, with the transmission line reference plane preventing shunt capacitance between the signal path conductors and the PTHs.

摘要翻译： 具有改进的传输线完整性和增加的布线密度的多层电路基板和方法使用选择性地施加的传输线参考平面金属层来实现信号路径屏蔽和隔离，同时避免由于大直径通孔和传输之间的电容引起的阻抗下降 线参考平面金属层。 传输线参考平面定义穿过刚性衬底芯的信号承载电镀通孔（PTH）上方（或下方）的空隙，使得信号不会由于并联电容引起的阻抗失配而降级 从信号承载PTH的顶部（或底部）到传输线参考平面。 对于电压平面轴承PTH，不引入空隙，使得信号路径导体可以路由在电压平面轴承PTH上方或附近，传输线参考平面防止信号路径导体和PTH之间的分流电容。

公开(公告)号：US08625300B2

公开(公告)日：2014-01-07

申请号：US13603761

申请日：2012-09-05

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： H05K1/14

CPC分类号： G06F17/5077 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/0253 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49117 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322

摘要： Manufacturing circuits with reference plane voids over vias with a strip segment interconnect permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.

摘要翻译： 具有带状段互连的通孔上的参考平面空隙的制造电路允许在通孔上路由关键信号路径，同时仅通过插入电容略微增加。 传输线参考平面定义了通过刚性衬底芯的信号承载电镀通孔（PTH）上方（或下方）的空隙，使得信号不会被阻抗失配降级，否则会由分流电容引起 信号承载PTH的顶部（或底部）到传输线参考平面。 为了提供增加的布线密度，信号路径被布置在空隙上，但是通过将导电条包括通过空隙来防止由空隙引起的信号路径的破坏，从而减小与信号承载PTH的耦合并维持 信号路径导体。

公开(公告)号：US07821796B2

公开(公告)日：2010-10-26

申请号：US12015543

申请日：2008-01-17

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： H05K1/11

CPC分类号： G06F17/5077 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/0253 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49117 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322

摘要： Reference plane voids with a strip segment for improving transmission line integrity over vias permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.

摘要翻译： 具有用于改善通孔上的传输线完整性的带段的参考平面空隙允许在通孔上路由关键信号路径，同时仅通过插入电容略微增加。 传输线参考平面定义了通过刚性衬底芯的信号承载电镀通孔（PTH）上方（或下方）的空隙，使得信号不会被阻抗失配降级，否则会由分流电容引起 信号承载PTH的顶部（或底部）到传输线参考平面。 为了提供增加的布线密度，信号路径被布置在空隙上，但是通过将导电条包括通过空隙来防止由空隙引起的信号路径的破坏，从而减小与信号承载PTH的耦合并维持 信号路径导体。

公开(公告)号：US20090184784A1

公开(公告)日：2009-07-23

申请号：US12015543

申请日：2008-01-17

申请人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

发明人： Sungjun Chun ,  Anand Haridass ,  Roger D. Weekly

IPC分类号： H01P1/00 ,  H05K3/00

CPC分类号： G06F17/5077 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/0253 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49117 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322

摘要： Reference plane voids with a strip segment for improving transmission line integrity over vias permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.

摘要翻译： 具有用于改善通孔上的传输线完整性的带段的参考平面空隙允许在通孔上路由关键信号路径，同时仅通过插入电容略微增加。 传输线参考平面定义了通过刚性衬底芯的信号承载电镀通孔（PTH）上方（或下方）的空隙，使得信号不会被阻抗失配降级，否则会由分流电容引起 信号承载PTH的顶部（或底部）到传输线参考平面。 为了提供增加的布线密度，信号路径被布置在空隙上，但是通过将导电条包括通过空隙来防止由空隙引起的信号路径的破坏，从而减小与信号承载PTH的耦合并维持 信号路径导体。