-
1.发明授权Circuit arrangement and imaging pyrometer for generating light- and temperature-dependent signals 有权电路布置和成像高温计，用于产生光和温度相关信号公开(公告)号：US08309924B2
公开(公告)日：2012-11-13
申请号：US12773349
申请日：2010-05-04
IPC分类号： H01L25/00
CPC分类号： G01J5/60 , G01J5/602 , H01L31/02005 , H01L31/02165 , H01L31/103 , H01L31/105
摘要： A circuit arrangement for generating light-dependent and temperature-dependent signals has a number of first and second sensor elements, which generate a number of first and second electrical signals. The first and second electrical signals depend on electromagnetic radiation impinging on the circuit arrangement. The first sensor elements are designed to generate the first electrical signals in a manner dependent on electromagnetic radiation from a first wavelength range which comprises a substantial part of the visible light. The second sensor elements are designed to generate the second electrical signals in a manner dependent on electromagnetic radiation from a second wavelength range which predominantly comprises infrared radiation. The first wavelength range overlaps the second wavelength range and it therefore also comprises infrared radiation.
摘要翻译： 用于产生光依赖和依赖于温度的信号的电路装置具有多个第一和第二传感器元件，其产生多个第一和第二电信号。 第一和第二电信号取决于照射在电路装置上的电磁辐射。 第一传感器元件被设计成以取决于包括大部分可见光的第一波长范围的电磁辐射的方式产生第一电信号。 第二传感器元件被设计成以取决于主要包括红外辐射的第二波长范围的电磁辐射的方式产生第二电信号。 第一波长范围与第二波长范围重叠，因此也包括红外辐射。
-
公开(公告)号：US08508038B2
公开(公告)日：2013-08-13
申请号：US13344089
申请日：2012-01-05
IPC分类号： H01L23/13
CPC分类号： H01L23/5389 , H01L21/568 , H01L21/6835 , H01L23/4985 , H01L24/19 , H01L24/82 , H01L2221/68359 , H01L2224/04105 , H01L2224/24247 , H01L2224/32225 , H01L2224/73267 , H01L2224/9222 , H01L2924/01004 , H01L2924/01013 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01068 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/14 , H01L2924/15192 , H01L2924/19043 , H01L2924/00
摘要： A semiconductor substrate having a first lateral dimension is combined with a flexible film piece having a second lateral dimension by arranging the semiconductor substrate in a recess of the film piece. The semiconductor substrate has circuit structures produced using lithography process steps. After the semiconductor substrate has been arranged in the recess of the film piece, a patterned layer of an electrically conductive material is produced above the semiconductor substrate and the film piece using lithography process steps. The patterned layer extends from the semiconductor substrate up to the flexible film piece and forms a number of electrically conductive contact tracks between the semiconductor substrate and the film piece.
摘要翻译： 具有第一横向尺寸的半导体衬底通过将半导体衬底布置在膜片的凹部中而与具有第二横向尺寸的柔性膜片组合。 半导体衬底具有使用光刻工艺步骤制造的电路结构。 在半导体衬底已经布置在膜片的凹部中之后，使用光刻工艺步骤在半导体衬底和膜片之上制造导电材料的图案化层。 图案化层从半导体衬底延伸到柔性膜片，并在半导体衬底和膜片之间形成多个导电接触轨迹。
-
公开(公告)号：US5461250A
公开(公告)日：1995-10-24
申请号：US927901
申请日：1992-08-10
IPC分类号： H01L29/78 , H01L21/336 , H01L29/786 , H01L27/12
CPC分类号： H01L29/66742 , H01L29/78648 , H01L29/78687
摘要： A dual gate thin film or SOI MOSFET device having a sufficiently thin body thickness with one or more semiconductor channel layer(s) sandwiched by semiconductor layers having a different energy band structure to automatically confine carriers to the channel layer(s) without the need for channel grading or modulation doping. Preferred embodiments employ strained layer epitaxy having Si/SiGe/Si or SiGe/Si/SiGe semiconductor layers.
摘要翻译： 具有足够薄的体厚度的双栅极薄膜或SOI MOSFET器件，其中一个或多个半导体沟道层被具有不同能带结构的半导体层夹在中间，以自动将载流子限制在沟道层上，而不需要 信道分级或调制掺杂。 优选实施例采用具有Si / SiGe / Si或SiGe / Si / SiGe半导体层的应变层外延。
-
公开(公告)号：US08466037B2
公开(公告)日：2013-06-18
申请号：US12208585
申请日：2008-09-11
IPC分类号： H01L21/46
CPC分类号： H01L21/7813 , H01L21/02002
摘要： In a method for producing a very thin chip including an integrated circuit, a circuit structure is produced in a defined section of a semiconductor wafer. The defined wafer section is subsequently released from the semiconductor wafer. For this purpose, the wafer section is firstly freed such that it is held only via local web-like connections on the remaining semiconductor wafer, which web-like connections are arranged at a lateral periphery of the wafer section. The web-like connections are subsequently severed.
摘要翻译： 在用于制造包括集成电路的非常薄的芯片的方法中，在半导体晶片的限定部分中产生电路结构。 随后从半导体晶片释放限定的晶片部分。 为此目的，晶片部分首先被释放，使得其仅通过剩余半导体晶片上的局部网状连接保持，该网状连接被布置在晶片部分的横向周边。 网状连接随后被切断。
-
公开(公告)号：US20120161293A1
公开(公告)日：2012-06-28
申请号：US13344089
申请日：2012-01-05
CPC分类号： H01L23/5389 , H01L21/568 , H01L21/6835 , H01L23/4985 , H01L24/19 , H01L24/82 , H01L2221/68359 , H01L2224/04105 , H01L2224/24247 , H01L2224/32225 , H01L2224/73267 , H01L2224/9222 , H01L2924/01004 , H01L2924/01013 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01068 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/14 , H01L2924/15192 , H01L2924/19043 , H01L2924/00
摘要： A semiconductor substrate having a first lateral dimension is combined with a flexible film piece having a second lateral dimension by arranging the semiconductor substrate in a recess of the film piece. The semiconductor substrate has circuit structures produced using lithography process steps. After the semiconductor substrate has been arranged in the recess of the film piece, a patterned layer of an electrically conductive material is produced above the semiconductor substrate and the film piece using lithography process steps. The patterned layer extends from the semiconductor substrate up to the flexible film piece and forms a number of electrically conductive contact tracks between the semiconductor substrate and the film piece.
摘要翻译： 具有第一横向尺寸的半导体衬底通过将半导体衬底布置在膜片的凹部中而与具有第二横向尺寸的柔性膜片组合。 半导体衬底具有使用光刻工艺步骤制造的电路结构。 在半导体衬底已经布置在膜片的凹部中之后，使用光刻工艺步骤在半导体衬底和膜片之上制造导电材料的图案化层。 图案化层从半导体衬底延伸到柔性膜片，并在半导体衬底和膜片之间形成多个导电接触轨迹。
-
6.发明授权Fabrication of vertical SiGe base HBT with lateral collector contact on thin SOI 失效在薄SOI上制造具有横向集电极接触的垂直SiGe基极HBT
公开(公告)号：US5583059A
公开(公告)日：1996-12-10
申请号：US251987
申请日：1994-06-01
申请人： Joachim N. Burghartz
发明人： Joachim N. Burghartz
IPC分类号： H01L21/331 , H01L21/8222 , H01L21/8236 , H01L21/8248 , H01L21/8249 , H01L27/06 , H01L27/088 , H01L27/12 , H01L29/165 , H01L29/73 , H01L29/737 , H01L29/786 , H01L21/265
CPC分类号： H01L29/66242 , H01L27/0605 , H01L27/0623 , H01L27/1203 , H01L29/7317 , H01L29/7378 , H01L29/78684 , Y10S148/01 , Y10S148/011 , Y10S148/072 , Y10S148/15
摘要： A SiGe-HBT structure for device integration on thin-SOI substrates is disclosed. The emitter and base regions are vertical while the collector contact is lateral in the otherwise MOS-like device structure. This allows one to integrate a SiGe base, the device capacitances are reduced, and the transistor can be combined with fully-depleted CMOS in a SOI-BiCMOS technology.
摘要翻译： 公开了一种用于在薄SOI衬底上集成器件的SiGe-HBT结构。 发射极和基极区域是垂直的，而集电极触点在另外的MOS状器件结构中是横向的。 这允许集成SiGe基极，器件电容降低，并且晶体管可以与SOI-BiCMOS技术中的完全耗尽的CMOS组合。
-
7.发明授权Method for producing a thin semiconductor chip comprising an integrated circuit 有权包括集成电路的薄半导体芯片的制造方法公开(公告)号：US07951691B2
公开(公告)日：2011-05-31
申请号：US12208514
申请日：2008-09-11
IPC分类号： H01L21/00
CPC分类号： H01L21/7813 , H01L21/02002
摘要： In a method for producing a thin film chip including an integrated circuit, a semi-conductor wafer having a first surface is provided. At least one cavity is produced under a defined section of the first surface by means of porous silicon. A circuit structure is produced in the defined section. The defined wafer section is subsequently released from the semiconductor wafer by severing local web-like connections, which hold the wafer section above the cavity and on the remaining semiconductor wafer.
摘要翻译： 在制造包括集成电路的薄膜芯片的方法中，提供具有第一表面的半导体晶片。 通过多孔硅在第一表面的限定部分下产生至少一个空腔。 在定义的部分中产生电路结构。 通过切断将晶片部分保持在空腔上方和剩余的半导体晶片上的局部网状连接，随后将限定的晶片部分从半导体晶片释放。
-
8.发明授权Method of forming bipolar transistor having self-aligned emitter-base using selective and non-selective epitaxy 失效使用选择性和非选择性外延形成具有自对准发射体的双极晶体管的方法
公开(公告)号：US5059544A
公开(公告)日：1991-10-22
申请号：US219020
申请日：1988-07-14
IPC分类号： H01L29/73 , H01L21/331 , H01L29/732
CPC分类号： H01L29/66287 , H01L29/7325 , Y10S148/011
摘要： Selective and non-selective epitaxial growth is utilized to form a bipolar transistor having self-aligned emitter and base regions. A substrate of semiconductor material of a first conductivity type is provided and a first layer of semiconductor material of a second conductivity type is non-selectively epitaxially grown on the substrate. An insulating element is formed on a portion of the first layer of semiconductor material and a second layer of semiconductor material of the second conductivity type is selectively epitaxially grown on the first layer such that a portion of the second layer laterally overgrows onto an upper surface of the insulating element. The lateral overgrowth forms an aperture in the second layer to expose a region of the upper surface of insulating element. A layer of insulating material is formed on the second layer to isolate the second layer of semiconductor material from a subsequent deposition of conductive material. The portion of the insulating layer formed within the aperture narrows the aperture and the exposed region of the element. The exposed region of the element is removed to expose a portion of the first layer and an emitter region of the first conductivity type is formed in the first layer through the aperture.
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.021 秒)
