公开(公告)号：US4918402A

公开(公告)日：1990-04-17

申请号：US314294

申请日：1989-02-22

申请人： Johannes O. Voorman ,  Pieter J. Snijder ,  Johannes S. Vromans

发明人： Johannes O. Voorman ,  Pieter J. Snijder ,  Johannes S. Vromans

IPC分类号： H03H11/04 ,  H03H11/18 ,  H03H11/26 ,  H03H15/00 ,  H04B3/04

CPC分类号： H03H11/04 ,  H03H11/18 ,  H03H11/26

摘要： A third-order all-pass network for a delay circuit is formed by four coupled transconductors (G.sub.10 to G.sub.13) which are each represented by two transistors whose bases constitute the inputs and whose collectors constitute the outputs of the transconductor. A first input of these transconductors (G.sub.10 to G.sub.13) is connected to ground (3). Between the second inputs (25,26) of the first transconductor (G.sub.10) and the second transconductor (G.sub.11) a first capacitor (C.sub.1) is arranged, between the second inputs (26,27) of the second transconductor (G.sub.11) and the third transconductor (G.sub.12) a second capacitor (C2) is arranged, and between the second inputs (27,28) of the third transconductor (G.sub.12) and the fourth transconductor (G.sub.13) and a third capacitor (C3) is arranged. Further, a fourth capacitor (C4) is arranged between the second inputs (25,27) of the first transconductor (G.sub.10) and the third transconductor (G.sub.12), a fifth capacitor (C5) is arranged between the second inputs (26,28) of the second transconductor (G.sub.11) and the fourth transconductor (G.sub.13), and a sixth capacitor (C6) is arranged between the second inputs (25,28) of the first transconductor (G.sub.10) and the fourth transconductor (G.sub.13). The third (C3), fourth (C4) and sixth (C6) capacitors reduce resonance tendencies of the circuit and consequent resonance rise symptoms as a result of parasitic effects.

公开(公告)号：US4853651A

公开(公告)日：1989-08-01

申请号：US94471

申请日：1987-09-08

申请人： Johannes O. Voorman ,  Pieter J. Snijder ,  Johannes S. Vromans

发明人： Johannes O. Voorman ,  Pieter J. Snijder ,  Johannes S. Vromans

IPC分类号： H03H11/04 ,  H03H11/18 ,  H03H11/26 ,  H03H15/00 ,  H04B3/04

CPC分类号： H03H11/04 ,  H03H11/18 ,  H03H11/26

摘要： A third-order all-pass network for a delay circuit is formed by four coupled transconductors (G.sub.10 to G.sub.13) which are each represented by two transistors whose bases constitute the inputs and whose collectors constitute the outputs of the transconductor. A first input of these transconductors (G.sub.10 to G.sub.13) is connected to ground (3). Between the second inputs (25,26) of the first transconductor (G.sub.10) and the second transconductor (G.sub.11) a first capacitor (C.sub.1) is arranged, while between the second imputs (26,27) of the second transconductor (G.sub.11) and the third transconductor (G.sub.12) a second capacitor (C2) is arranged, and between the second inputs (27,28) of the third transconductor (G.sub.12) and the fourth transconductor (G.sub.13) a third capacitor (C3) is arranged. Further, a fourth capacitor (C4) is arranged between the second inputs (25,27) of the first transconductor (G.sub.10) and the third transconductor (G.sub.12), a fifth capacitor (C5) is arranged between the second inputs (26,28) of the second transconductor (G.sub.11) and the fourth transconductor (G.sub.13), and a sixth capacitor (C6) is arranged between the second inputs (25,28) of the first transconductor (G.sub.10) and the fourth transconductor (G.sub.13). The third (C3), fourth (C4) and sixth (C6) capacitors reduce resonance tendencies of the circuit and consequent resonant rise symptoms as a result of parasitic effects.

公开(公告)号：US5859566A

公开(公告)日：1999-01-12

申请号：US891821

申请日：1997-07-14

申请人： Johannes O. Voorman ,  Hugo Veenstra

发明人： Johannes O. Voorman ,  Hugo Veenstra

IPC分类号： H03B5/12 ,  H03F3/343 ,  H03F3/45 ,  H03H11/04 ,  H03H11/12

CPC分类号： H03H11/0422 ,  H03F3/343 ,  H03F3/45139 ,  H03F3/45542 ,  H03F2200/453 ,  H03F2203/45562

摘要： An electronic circuit comprises coupled transconductors (TR1 and TR2). The transconductors comprise two complementary differential pairs whose outputs are connected directly to two output terminals. Two diodes (P3, N3) are arranged in series between the common terminals of the differential pairs. The common-mode voltage of the differential pairs is available on the node between the two diodes. The common-mode voltage of the one transconductor (TR2) is used to control one of the bias current sources of the other transconductor (TR1) and, if desired, also that of the one transconductor (TR2). In this way the common-mode voltage on the output terminals of the other transconductor (TR1) is fixed.

摘要翻译： 电子电路包括耦合的跨导体（TR1和TR2）。 跨导体包括两个互补的差分对，其输出直接连接到两个输出端子。 两个二极管（P3，N3）串联布置在差分对的公共端子之间。 差分对的共模电压在两个二极管之间的节点上可用。 一个跨导体（TR2）的共模电压用于控制另一个跨导体（TR1）的偏置电流源之一，如果需要也可以控制一个跨导体（TR2）的偏置电流源。 以这种方式，另一个跨导体（TR1）的输出端上的共模电压是固定的。

公开(公告)号：US5568091A

公开(公告)日：1996-10-22

申请号：US490824

申请日：1995-06-15

申请人： Joao N. V. L. Ramalho ,  Johannes O. Voorman

发明人： Joao N. V. L. Ramalho ,  Johannes O. Voorman

IPC分类号： H03F3/45

CPC分类号： H03F3/45479

摘要： A differential amplifier with common-mode rejection for low supply voltages has a first and a second differential pair without transistors in the tails of the differential pairs and with proportional common-mode currents flowing through the first and the second differential pair. The differential amplifier includes a current mirror which feeds the common-mode current of the second differential pair (3, 4) back to the output terminals of the first differential pair for the rejection of common-mode currents at the output terminals. The voltage at the output terminals of the current mirror has a d.c. level which can be established by means of a first reference voltage source independently of the common-mode voltage at the input terminals of the differential amplifier.

摘要翻译： 具有用于低电源电压的共模抑制的差分放大器具有第一和第二差分对，差分对的尾部中没有晶体管，并且流过第一和第二差分对的正比共模电流。 差分放大器包括电流镜，其将第二差分对（3,4）的共模电流馈送回第一差分对的输出端，用于抑制输出端的共模电流。 电流镜的输出端的电压为直流电。 电平，其可以通过独立于差分放大器的输入端处的共模电压的第一参考电压源建立。

公开(公告)号：US5469475A

公开(公告)日：1995-11-21

申请号：US708561

申请日：1991-05-31

申请人： Johannes O. Voorman

发明人： Johannes O. Voorman

IPC分类号： H03M3/00 ,  H04B14/06 ,  H04L27/04

CPC分类号： H04L27/04 ,  H04B14/06

摘要： An electronic arrangement for generating a modulated carrier signal in a transmitter includes a sigma-delta (one-bit) signal converter and a mixer. The sigma-delta converter includes, in a closed signal loop, an adder, a low pass filter, and a pulse shaper driven with a specific sample rate. The mixer is driven with a carrier frequency fc and has an input coupled with an output of the pulse shaper. The carrier frequency fc is equal to or an integer multiple of the half sample rate.

摘要翻译： 用于在发射机中生成调制载波信号的电子装置包括Σ-Δ（1比特）信号转换器和混频器。 Σ-Δ转换器在闭合信号环路中包括加法器，低通滤波器和以特定采样率驱动的脉冲整形器。 混频器以载波频率fc驱动，并具有与脉冲整形器的输出耦合的输入。 载波频率fc等于半采样率的整数倍。

公开(公告)号：US4786880A

公开(公告)日：1988-11-22

申请号：US33140

申请日：1987-03-31

申请人： Johannes O. Voorman

发明人： Johannes O. Voorman

IPC分类号： H03H11/12 ,  H03F3/45 ,  H03H11/04 ,  H03F1/34

CPC分类号： H03H11/04 ,  H03F3/45089 ,  H03F3/45475 ,  H03F2203/45562 ,  H03H1/02

摘要： In a filter arrangement, a first junction capacitor is arranged between the inverting output and the non-inverting input of a fully balanced amplifier and a second junction capacitor is arranged between the non-inverting output and the inverting input. Additionally, a first resistor is arranged between a first input terminal and the non-inverting input and a second resistor is arranged between a second input terminal and the inverting input. A first current source is connected to the non-inverting input and a second current source is connected to the inverting input. The current sources produce the reverse voltages for the junction capacitors across the resistors to define the capacitance values of these capacitors.

公开(公告)号：US4431976A

公开(公告)日：1984-02-14

申请号：US319502

申请日：1981-11-09

申请人： Johannes O. Voorman

发明人： Johannes O. Voorman

IPC分类号： H03H15/00 ,  H03H21/00 ,  H04B3/04 ,  H04B3/23 ,  H04L25/03 ,  H04N5/21

CPC分类号： H03H21/00 ,  H04B3/23 ,  H04L25/03133 ,  H04L25/03146 ,  H04N5/21

摘要： In order to make an adaptive filter, having a delay circuit, (3) taps of which include amplitude control circuits (43, 45, 47, 49, 51, 53, 55, 57) which are controlled by an error signal (output of 149), more suitable for use in television receivers, a number of said amplitude control circuits (45, 55) are controlled by both the error signal (output from 149, 151, 125 and 153 , 127 respectively) and an inverse version of a signal corrected by the filter (output 119, 121, 125 and 123, 127 respectively).

摘要翻译： 为了制作具有延迟电路的自适应滤波器，（3）抽头包括幅度控制电路（43,45,47,49,51,53,55,57），其由误差信号（的输出 149），更适合用于电视接收机中，多个所述幅度控制电路（45,55）由误差信号（分别从149,151,125和153,127分别输出）和 由滤波器校正的信号（分别为输出119,121,125,123,127）。

公开(公告)号：US4210882A

公开(公告)日：1980-07-01

申请号：US859643

申请日：1977-12-12

申请人： Engel Roza ,  Johannes O. Voorman

发明人： Engel Roza ,  Johannes O. Voorman

IPC分类号： H03H7/30 ,  H03H11/18 ,  H03H11/26 ,  H03H15/00 ,  H03H7/28 ,  H03H7/10 ,  H03H7/22

CPC分类号： H03H15/00 ,  H03H11/18 ,  H03H11/26

摘要： A delay network, having a chain of all-pass sections, each comprising two separate branches, a resistive and a capacitive branch, which terminate in amplifiers with negligible signal consumption whose output signals are combined. This enables an analog delay network to be realized in integrated circuit technology.

摘要翻译： 具有全通部分链路的延迟网络，每个链路包括两个分离的分支，电阻和电容分支，其终止于输出信号被组合的具有可忽略的信号消耗的放大器。 这使得可以在集成电路技术中实现模拟延迟网络。

公开(公告)号：US4180785A

公开(公告)日：1979-12-25

申请号：US900711

申请日：1978-04-27

申请人： Johannes O. Voorman

发明人： Johannes O. Voorman

IPC分类号： H03C1/54 ,  H03C1/52

CPC分类号： H03C1/545

摘要： A modulator suitable for amplitude modulation includes first and second converters for converting the positive and negative excursions of first and second input signals into four respective signals of one polarity which are passed through a multiplying device and a difference producer to generate an output signal containing only the product terms of the first and second input signals.

摘要翻译： 适用于幅度调制的调制器包括第一和第二转换器，用于将第一和第二输入信号的正偏移和负偏移转换成四个相应的一个极性的信号，该信号通过乘法器和差产生器产生仅包含 第一和第二输入信号的产品术语。

公开(公告)号：US06304396B1

公开(公告)日：2001-10-16

申请号：US09241013

申请日：1999-02-01

申请人： Joao N. V. L. Ramalho ,  Johannes O. Voorman ,  Patrick Leclerc ,  Jozef A. M. Ramaekers ,  Marcel L Lugthart ,  Johannes W.M. Bergmans

发明人： Joao N. V. L. Ramalho ,  Johannes O. Voorman ,  Patrick Leclerc ,  Jozef A. M. Ramaekers ,  Marcel L Lugthart ,  Johannes W.M. Bergmans

IPC分类号： G11B502

CPC分类号： G11B20/10009 ,  G01R33/09 ,  G11B5/012 ,  G11B5/02 ,  G11B5/09 ,  G11B7/00 ,  G11B20/22 ,  G11B33/14 ,  G11B2005/0016 ,  G11B2005/0018

摘要： An arrangement is disclosed for reading information from a record carrier. The arrangement comprises a read head having at least one magneto-resistive element (Rmr), a first transistor (Tr1) and a second transistor (Tr2). The base of the first transistor (Tr1) is coupled to the emitter of the second transistor (Tr2) via a first capacitor (6). The base of the second transistor (Tr2) is coupled to the emitter of the first transistor (Tr1) via a second capacitor (8). The arrangement further comprises a non-linear transconductance amplifier (14) having first and second inputs coupled to the output terminals (10,12) of the arrangement, and having and inverting and non-inverting outputs coupled to the bases of the first and second transistor. The non-linear transconductance amplifier (14) is adapted to supply a control current at its inverting and non-inverting outputs in response to a voltage present across its inputs, such that for first and second input voltages resulting in first and second output currents, respectively, the first input voltage being larger than the second input voltage, the amplification factor of the transconductance means being larger for generating the first output current than for generating the second output current.

摘要翻译： 公开了一种用于从记录载体读取信息的装置。 该装置包括具有至少一个磁阻元件（Rmr），第一晶体管（Tr1）和第二晶体管（Tr2）的读取头。 第一晶体管（Tr1）的基极经由第一电容器（6）耦合到第二晶体管（Tr2）的发射极。 第二晶体管（Tr2）的基极通过第二电容器（8）耦合到第一晶体管（Tr1）的发射极。 该装置还包括具有耦合到该装置的输出端子（10,12）的第一和第二输入的非线性跨导放大器（14），并且具有耦合到第一和第二输入端的基极的反相和非反相输出 晶体管。 非线性跨导放大器（14）适于响应于跨过其输入端的电压而在其反相和非反相输出端提供控制电流，使得对于产生第一和第二输出电流的第一和第二输入电压， 分别地，第一输入电压大于第二输入电压，跨导装置的放大系数比用于产生第二输出电流的产生第一输出电流大。