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    Leaded multi-layer ceramic capacitor with low ESL and low ESR
    1.
    发明授权
    Leaded multi-layer ceramic capacitor with low ESL and low ESR 有权
    具有低ESL和低ESR的带铅多层陶瓷电容器

    公开(公告)号：US08331078B2

    公开(公告)日：2012-12-11

    申请号：US12732549

    申请日：2010-03-26

    申请人： John E. McConnell ,  Reggie Phillips ,  Alan P. Webster ,  John Bultitude ,  Mark R. Laps ,  Lonnie G. Jones ,  Garry Renner

    发明人： John E. McConnell ,  Reggie Phillips ,  Alan P. Webster ,  John Bultitude ,  Mark R. Laps ,  Lonnie G. Jones ,  Garry Renner

    IPC分类号： H01G4/228

    CPC分类号： H01G4/30 ,  H01G2/065 ,  H01G4/232 ,  H05K3/3426

    摘要： A multi-layered ceramic capacitor with at least one chip and with first base metal plates in a parallel spaced apart relationship and second base metal plates in a parallel spaced apart relationship wherein the first plates and second plates are interleaved. A dielectric is between the first base metal plates and said second base metal plates and the dielectric has a first coefficient of thermal expansion. A first termination is in electrical contact with the first plates and a second termination is in electrical contact with the second plates. Lead frames are attached to, and in electrical contact with, the terminations wherein the lead frames have a second coefficient of thermal expansion and the second coefficient of thermal expansion is higher than said first coefficient of thermal expansion. The lead frame is a non-ferrous material.

    摘要翻译： 一种多层陶瓷电容器，其具有至少一个芯片，并且具有平行隔开的关系的第一基底金属板和平行隔开的关系的第二基底金属板，其中第一板和第二板被交错。 电介质位于第一基底金属板和第二基底金属板之间，电介质具有第一热膨胀系数。 第一端接件与第一板电接触，第二端接件与第二板电接触。 引线框架连接到端子处并与其接触，其中引线框架具有第二热膨胀系数，并且第二热膨胀系数高于所述第一热膨胀系数。 引线框架是有色金属材料。

    LEADED MULTI-LAYER CERAMIC CAPACITOR WITH LOW ESL AND LOW ESR
    2.
    发明申请
    LEADED MULTI-LAYER CERAMIC CAPACITOR WITH LOW ESL AND LOW ESR 有权
    领先的多层陶瓷电容器，具有低ESL和低ESR

    公开(公告)号：US20100243307A1

    公开(公告)日：2010-09-30

    申请号：US12732549

    申请日：2010-03-26

    申请人： John E. McConnell ,  Reggie Phillips ,  Alan P. Webster ,  John Bultitude ,  Mark R. Laps ,  Lonnie G. Jones ,  Garry Renner

    发明人： John E. McConnell ,  Reggie Phillips ,  Alan P. Webster ,  John Bultitude ,  Mark R. Laps ,  Lonnie G. Jones ,  Garry Renner

    IPC分类号： H01G4/228 ,  H05K1/18

    CPC分类号： H01G4/30 ,  H01G2/065 ,  H01G4/232 ,  H05K3/3426

    摘要： A multi-layered ceramic capacitor with at least one chip and with first base metal plates in a parallel spaced apart relationship and second base metal plates in a parallel spaced apart relationship wherein the first plates and second plates are interleaved. A dielectric is between the first base metal plates and said second base metal plates and the dielectric has a first coefficient of thermal expansion. A first termination is in electrical contact with the first plates and a second termination is in electrical contact with the second plates. Lead frames are attached to, and in electrical contact with, the terminations wherein the lead frames have a second coefficient of thermal expansion and the second coefficient of thermal expansion is higher than said first coefficient of thermal expansion. The lead frame is a non-ferrous material.

    摘要翻译： 一种多层陶瓷电容器，其具有至少一个芯片，并且具有平行隔开的关系的第一基底金属板和平行隔开的关系的第二基底金属板，其中第一板和第二板被交错。 电介质位于第一基底金属板和第二基底金属板之间，电介质具有第一热膨胀系数。 第一端接件与第一板电接触，第二端接件与第二板电接触。 引线框架连接到端子处并与其接触，其中引线框架具有第二热膨胀系数，并且第二热膨胀系数高于所述第一热膨胀系数。 引线框架是有色金属材料。

    STACKED LEADED ARRAY
    7.
    发明申请
    STACKED LEADED ARRAY 有权
    堆积领导阵列

    公开(公告)号：US20130016488A1

    公开(公告)日：2013-01-17

    申请号：US13533283

    申请日：2012-06-26

    申请人： John E. McConnell ,  John Bultitude ,  Lonnie Jones ,  Alan Webster

    发明人： John E. McConnell ,  John Bultitude ,  Lonnie Jones ,  Alan Webster

    IPC分类号： H05K7/06

    CPC分类号： H01G4/232 ,  H01G4/38

    摘要： A stacked leaded array is provided wherein the stacked leaded array allows for increased packing density of electronic components. The stacked leaded array has a multiplicity of electronic components in a stacked array. Each electronic component comprises a first termination and a second termination. A multiplicity of first leads are provided wherein each first lead is in electrical contact with at least one first termination. Second leads are in electrical contact with second terminations.

    摘要翻译： 提供堆叠的引线阵列，其中堆叠的引线阵列允许增加电子部件的封装密度。 堆叠引线阵列具有堆叠阵列中的多个电子部件。 每个电子部件包括第一终端和第二终端。 提供多个第一引线，其中每个第一引线与至少一个第一端接电接触。 第二引线与第二端接电接触。

    Stacked leaded array
    9.
    发明授权
    Stacked leaded array 有权
    堆叠引线阵列

    公开(公告)号：US09171672B2

    公开(公告)日：2015-10-27

    申请号：US13533283

    申请日：2012-06-26

    申请人： John E. McConnell ,  John Bultitude ,  Lonnie Jones ,  Alan Webster

    发明人： John E. McConnell ,  John Bultitude ,  Lonnie Jones ,  Alan Webster

    IPC分类号： H05K7/06 ,  H01G4/232 ,  H01G4/38

    CPC分类号： H01G4/232 ,  H01G4/38

    摘要： A stacked leaded array is provided wherein the stacked leaded array allows for increased packing density of electronic components. The stacked leaded array has a multiplicity of electronic components in a stacked array. Each electronic component comprises a first termination and a second termination. A multiplicity of first leads are provided wherein each first lead is in electrical contact with at least one first termination. Second leads are in electrical contact with second terminations.

    摘要翻译： 提供堆叠的引线阵列，其中堆叠的引线阵列允许增加电子部件的封装密度。 堆叠引线阵列具有堆叠阵列中的多个电子部件。 每个电子部件包括第一终端和第二终端。 提供多个第一引线，其中每个第一引线与至少一个第一端接电接触。 第二引线与第二端接电接触。