-
1.发明申请IEEE 1394 INTERFACE-BASED FLASH DRIVE USING MULTILEVEL CELL FLASH MEMORY DEVICES 审中-公开IEEE 1394基于接口的闪存驱动器，使用多单元电池闪存存储器件公开(公告)号：US20080222349A1
公开(公告)日：2008-09-11
申请号：US12043628
申请日：2008-03-06
IPC分类号： G06F12/00
CPC分类号： G06F13/385 , G11C11/5621
摘要： A flash drive and method of transferring data from a system to a flash drive. The flash drive includes a casing, a plurality of flash memory devices within the casing, each of the flash memory devices having multilevel cells, an IEEE 1394 interface controller within the casing, coupled to the flash memory devices, and interfacing with the flash memory devices for interleaved multichannel access to and from at least two of the flash memory devices, and at least one IEEE 1394 interface connector projecting from the casing for interfacing the flash memory devices with a system through the controller. The method entails coupling a plurality of multilevel cell flash memory devices to a system through an IEEE 1394 interface controller and at least one IEEE 1394 interface connector, and performing interleaved multichannel access to and from at least two of the flash memory devices.
摘要翻译： 闪存驱动器和将数据从系统传输到闪存驱动器的方法。 闪存驱动器包括壳体，壳体内的多个闪存器件，每个闪存器件具有多电平单元，壳体内的IEEE 1394接口控制器，耦合到闪存器件，并与闪存器件接口 用于对来自至少两个闪存器件的交织多通道访问，以及从壳体突出的至少一个IEEE 1394接口连接器，用于通过控制器将闪存器件与系统接口连接。 该方法需要通过IEEE 1394接口控制器和至少一个IEEE 1394接口连接器将多个多电平单元闪存器件耦合到系统，并且执行至少两个闪存器件的交错多通道访问。
-
2.发明授权Mass storage systems and methods using solid-state storage media and ancillary interfaces for direct communication between memory cards 有权使用固态存储介质的大容量存储系统和方法以及用于存储卡之间的直接通信的辅助接口公开(公告)号：US08949509B2
公开(公告)日：2015-02-03
申请号：US13311723
申请日：2011-12-06
CPC分类号： G06F3/061 , G06F3/0658 , G06F3/0659 , G06F3/0688 , G06F13/40
摘要： A mass storage system comprising multiple memory cards, each with non-volatile memory components, a system bus interface for communicating with a system bus of a host system, and at least one ancillary interface. The ancillary interface is configured for direct communication of commands, addresses and data between the memory cards via a cross-link connector without accessing the system bus interface.
摘要翻译： 一种大容量存储系统，包括多个存储卡，每个具有非易失性存储器组件，用于与主机系统的系统总线通信的系统总线接口以及至少一个辅助接口。 辅助接口被配置为通过交叉连接器直接通信存储卡之间的命令，地址和数据，而不需要访问系统总线接口。
-
3.发明授权Memory system and method for generating and transferring parity information 有权用于生成和传送奇偶校验信息的存储器系统和方法公开(公告)号：US08566669B2
公开(公告)日：2013-10-22
申请号：US13177839
申请日：2011-07-07
CPC分类号： G06F11/1048
摘要： A memory system and method for generating and transferring parity information within burst transactions of burst read and write transfers and without dedicated parity chips or parity data lines.
摘要翻译： 一种用于在突发读和写传输的突发事务中产生和传送奇偶校验信息并且没有专用奇偶校验芯片或奇偶校验数据线的存储器系统和方法。
-
公开(公告)号：US08489966B2
公开(公告)日：2013-07-16
申请号：US12986564
申请日：2011-01-07
申请人： Franz Michael Schuette , Lutz Filor
发明人： Franz Michael Schuette , Lutz Filor
IPC分类号： G11C29/00
CPC分类号： G11C29/00 , G06F11/0727 , G06F11/0751 , G11C29/52
摘要： A solid-state mass storage device and method of operating the storage device to anticipate the failure of at least one memory device thereof before a write endurance limitation is reached. The method includes assigning at least a first memory block of the memory device as a wear indicator that is excluded from use as data storage, using pages of at least a set of memory blocks of the memory device for data storage, writing data to and erasing data from each memory block of the set in program/erase (P/E) cycles, performing wear leveling on the set of memory blocks, subjecting the wear indicator to more P/E cycles than the set of memory blocks, performing integrity checks of the wear indicator and monitoring its bit error rate, and taking corrective action if the bit error rate increases.
摘要翻译： 一种固态大容量存储装置和方法，用于在达到写入耐力限制之前操作存储装置以预测其至少一个存储器件的故障。 该方法包括将存储器件的至少第一存储块分配为作为数据存储被排除的磨损指示符，使用用于数据存储的存储器件的至少一组存储器块的页面，将数据写入和擦除 在程序/擦除（P / E）循环中来自该组的每个存储器块的数据，对该组存储器块执行磨损均衡，对磨损指示器进行比该组存储器块更多的P / E周期，执行完整性检查 磨损指示器并监视其误码率，如果误码率增加，则采取纠正措施。
-
公开(公告)号：US08489855B2
公开(公告)日：2013-07-16
申请号：US13103270
申请日：2011-05-09
CPC分类号： G06F12/0246 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0652 , G06F3/0679 , G06F2212/7202 , G06F2212/7205 , G06F2212/7211
摘要： A solid state drive that uses over-provisioning of NAND flash memory blocks as part of housekeeping functionality, including deduplication and coalescence of data for efficient usage of NAND flash memory devices and maintaining sufficient numbers of erased blocks to promote write performance.
摘要翻译： 一种固态驱动器，其使用NAND闪存块的过度供应作为内务管理功能的一部分，包括用于有效利用NAND闪速存储器件的数据的重复数据消除和聚合，并保持足够数量的擦除块来提升写入性能。
-
公开(公告)号：US20120173795A1
公开(公告)日：2012-07-05
申请号：US13115716
申请日：2011-05-25
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F3/0608 , G06F3/0641 , G06F3/0679 , G06F2212/7208
摘要： A solid state drive having a non-volatile memory device and methods of operating the solid state drive to compare existing data stored on the memory device to subsequent data in an incoming data stream received by the solid state drive from a host system. If matching data are found, the solid state drive uses the existing data instead of writing the subsequent data to the memory device. Common data patterns can be shared among different files stored on the memory device.
摘要翻译： 具有非易失性存储器件的固态驱动器和操作固态驱动器以将存储在存储器件中的存储数据与固态驱动器从主机系统接收的输入数据流中的后续数据进行比较的方法。 如果找到匹配数据，则固态驱动器使用现有数据，而不是将后续数据写入存储器件。 公共数据模式可以在存储在存储设备上的不同文件之间共享。
-
7.发明申请METHODS, STORAGE DEVICES, AND SYSTEMS FOR PROMOTING THE ENDURANCE OF NON-VOLATILE SOLID-STATE MEMORY COMPONENTS 有权用于促进非挥发性固态存储器组件的耐久性的方法，存储设备和系统公开(公告)号：US20120166716A1
公开(公告)日：2012-06-28
申请号：US13337482
申请日：2011-12-27
CPC分类号： G11C16/10 , G11C13/0004 , G11C13/0069 , G11C16/3495
摘要： Solid-state mass storage devices, host computer systems, and methods of increasing the endurance of non-volatile solid-state memory components used therein. The memory components comprise memory cells organized in functional units that are adapted to receive units of data transferred from the host computer system and correspond to the functional units of the memory component. The level of programming for each cell is reduced by performing an analysis of the bit values of the units of data to be written to at least a first of the functional units of the memory component. Depending on the analysis of “0” and “1” bit values of the units of data to be written, the bit values are inverted before writing the units of data to the first memory component.
摘要翻译： 固态大容量存储设备，主机系统以及增加其中使用的非易失性固态存储器组件的耐久性的方法。 存储器组件包括以功能单元组织的存储器单元，其适于接收从主计算机系统传送的数据单元并对应于存储器组件的功能单元。 通过对要写入存储器组件的至少第一功能单元的数据单元的位值进行分析来减小每个单元的编程级别。 根据要写入的数据单元的“0”和“1”位值的分析，在将数据单位写入第一存储器组件之前，将位值反转。
-
公开(公告)号：US08151030B2
公开(公告)日：2012-04-03
申请号：US11138768
申请日：2005-05-25
CPC分类号： G11C7/22 , G11C7/1021 , G11C7/1051 , G11C7/1066 , G11C7/1072 , G11C7/222 , G11C11/4076 , G11C11/4096
摘要： The present invention provides a method of increasing DDR memory bandwidth in DDR SDRAM modules. DDR memory has an inherent feature called the Variable Early Read command, where the read command is issued one CAS latency before the termination of an ongoing data burst By using the Variable Early Read command the effect of the CAS latency is minimized in terms of the effect on bandwidth. The enhanced bandwidth technology achieved with this invention optimizes the remaining two access latencies (tRP and tRCD) for optimal bandwidth. These optimizations in the SPD allow for much better bandwidth in real world applications.
摘要翻译： 本发明提供了一种在DDR SDRAM模块中增加DDR存储器带宽的方法。 DDR存储器具有称为可变早期读取命令的固有功能，其中读取命令在正在进行的数据突发终止之前发出一个CAS延迟通过使用可变早期读取命令，CAS延迟的影响在效果方面被最小化 带宽。 通过本发明实现的增强带宽技术优化了用于最佳带宽的剩余的两个接入延迟（tRP和tRCD）。 SPD中的这些优化可以在现实世界的应用中实现更好的带宽。
-
9.发明申请公开(公告)号：US20110320690A1
公开(公告)日：2011-12-29
申请号：US13211760
申请日：2011-08-17
CPC分类号： G06F3/0658 , G06F3/0611 , G06F3/0626 , G06F3/0647 , G06F3/0685 , G06F11/1441 , G06F11/2015 , G06F12/0866 , G06F2212/217 , G11B33/128
摘要： Methods and systems for mass storage of data over two or more tiers of mass storage media that include nonvolatile solid-state memory devices, hard disk devices, and optionally volatile memory devices or nonvolatile MRAM in an SDRAM configuration. The mass storage media interface with a host through one or more PCIe lanes on a single printed circuit board.
摘要翻译： 大容量存储包括非易失性固态存储设备，硬盘设备和可选易失性存储设备的两层或多层海量存储介质中的数据的大容量存储方法和系统，或者SDRAM配置中的非易失性MRAM。 大容量存储介质通过单个印刷电路板上的一个或多个PCIe通道与主机进行接口。
-
公开(公告)号：US20110283043A1
公开(公告)日：2011-11-17
申请号：US13181589
申请日：2011-07-13
CPC分类号： G06F3/0658 , G06F3/0626 , G06F3/0679 , G06F12/0246 , G06F2212/7208
摘要： Non-volatile storage devices and methods capable of achieving large capacity solid state drives containing multiple banks of memory devices. The storage devices include a printed circuit board, at least two banks of non-volatile solid-state memory devices, bank switching circuitry, a connector, and a memory controller. The bank switching circuitry is integrated onto the memory controller and functionally interposed between the banks of memory devices and the front end of the memory controller. The bank switching circuitry operates to switch accesses by the memory controller among the at least two banks.
摘要翻译： 能够实现包含多组存储器件的大容量固态驱动器的非易失性存储设备和方法。 存储设备包括印刷电路板，至少两组非易失性固态存储器件，组开关电路，连接器和存储器控制器。 存储体切换电路被集成到存储器控制器上，功能上介于存储器件组和存储器控制器的前端之间。 存储体切换电路操作以在至少两个存储体之间切换存储器控制器的访问。
-
-
-
-
-
-
-
-
-
搜索结果
79 条记录 (耗时 0.026 秒)
