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    METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING LANDING PADS FORMED BY ELECTROLESS PLATING
    1.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING LANDING PADS FORMED BY ELECTROLESS PLATING 有权
    形成半导体器件的方法，包括通过电镀镀层形成的引线垫

    公开(公告)号：US20110003476A1

    公开(公告)日：2011-01-06

    申请号：US12829776

    申请日：2010-07-02

    申请人： Jong-ho Yun ,  Gil-heyun Choi ,  Jong-myeong Lee

    发明人： Jong-ho Yun ,  Gil-heyun Choi ,  Jong-myeong Lee

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76895 ,  H01L21/288 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76879

    摘要： A semiconductor device in which an increase of contact resistance Rc between a metal contact and a plug due to misalignment between the metal contact and the plug can be reduced and the difficulty of a Cu filling process during the process of forming the plug may be reduced. The semiconductor device includes a substrate including an active area and a device isolation layer; a metal contact that is formed on the substrate and is electrically connected to the active area; a landing pad formed on the metal contact by electroless plating; and a plug that is formed on the landing pad and is electrically connected to the metal contact via the landing pad.

    摘要翻译： 可以减少由于金属接触和插塞之间的未对准而导致金属接触和插塞之间的接触电阻Rc增大的半导体器件，并且可以减少在形成插头的过程中Cu填充过程的困难。 半导体器件包括：衬底，其包括有源区和器件隔离层; 金属接触件，其形成在所述基板上并电连接到所述有源区域; 通过无电镀形成在金属接触件上的着陆垫; 以及形成在所述着陆板上并且经由所述着陆垫电连接到所述金属接触件的插头。

    Methods of forming interlayer dielectrics having air gaps
    2.
    发明授权
    Methods of forming interlayer dielectrics having air gaps 有权
    形成具有气隙的层间电介质的方法

    公开(公告)号：US07842600B2

    公开(公告)日：2010-11-30

    申请号：US12364598

    申请日：2009-02-03

    申请人： Jong-ho Yun ,  Jong-Myeong Lee ,  Gil-heyun Choi

    发明人： Jong-ho Yun ,  Jong-Myeong Lee ,  Gil-heyun Choi

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/7682 ,  H01L21/76849 ,  H01L2224/05026 ,  H01L2224/05639 ,  H01L2224/05669 ,  H01L2224/13 ,  H01L2924/00014 ,  H01L2224/05099

    摘要： Methods of forming an interlayer dielectric having an air gap are provided including forming a first insulating layer on a semiconductor substrate. The first insulating layer defines a trench. A metal wire is formed in the trench such that the metal wire is recessed beneath an upper surface of the first insulating layer. A metal layer is formed on the metal wire, wherein the metal layer includes a capping layer portion filling the recess, a upper portion formed on the capping layer portion, and an overhang portion formed on the portion of the first insulating layer adjacent to the trench protruding sideward from the upper portion. The first insulating layer is removed and a second insulating layer is formed on the semiconductor substrate to cover the metal layer, whereby an air gap is formed below the overhang portion of the metal layer. A portion of the second insulating layer is removed to expose the upper portion of the metal layer. The upper portion and the overhang portion of the metal layer are removed. A third insulating layer is formed on the semiconductor substrate from which the upper portion and the overhang portion have been removed to maintain the air gap.

    摘要翻译： 提供了形成具有气隙的层间电介质的方法，包括在半导体衬底上形成第一绝缘层。 第一绝缘层限定沟槽。 在沟槽中形成金属线，使得金属线在第一绝缘层的上表面下方凹入。 在金属线上形成金属层，其中金属层包括填充凹部的覆盖层部分，形成在覆盖层部分上的上部，和形成在与沟槽相邻的第一绝缘层的部分上的突出部分 从上部侧向突出。 去除第一绝缘层，并且在半导体衬底上形成覆盖金属层的第二绝缘层，由此在金属层的伸出部分的下方形成气隙。 去除第二绝缘层的一部分以露出金属层的上部。 去除金属层的上部和外伸部分。 在半导体基板上形成第三绝缘层，从该基板上去除上部和外伸部分以保持气隙。

    SEMICONDUCTOR DEVICE INCLUDING FUSE
    3.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING FUSE 有权
    包括保险丝的半导体器件

    公开(公告)号：US20100193902A1

    公开(公告)日：2010-08-05

    申请号：US12502490

    申请日：2009-07-14

    申请人： Seung-woo SHIN ,  Byung-Iyul Park ,  Jong-myeong Lee ,  Gil-heyun Choi ,  Jong-ho Yun

    发明人： Seung-woo SHIN ,  Byung-Iyul Park ,  Jong-myeong Lee ,  Gil-heyun Choi ,  Jong-ho Yun

    IPC分类号： H01L23/525

    CPC分类号： H01L23/5258 ,  H01L27/105 ,  H01L27/10894 ,  H01L27/10897 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided is a semiconductor device including a fuse, in which a insulating layer surrounding the fuse or metal wiring is prevented from being damaged due to the cut of a fuse, which can occur when a repair process is performed. The semiconductor device includes a conductive line formed on a semiconductor layer, a protective layer formed on the conductive line, one or more fuses that are electrically connected to the conductive line, and a fuse protective layer formed on the one or more fuses, and spaced apart from the protective layer.

    摘要翻译： 提供了一种包括保险丝的半导体器件，其中防止在保险丝或金属布线周围的绝缘层由于保险丝的切断而被损坏，这在维修过程中可能发生。 半导体器件包括形成在半导体层上的导电线，形成在导电线上的保护层，与导电线电连接的一个或多个保险丝，以及形成在一个或多个保险丝上的保险丝保护层， 除了保护层。

    Semiconductor device including fuse
    4.
    发明授权
    Semiconductor device including fuse 有权
    半导体装置包括保险丝

    公开(公告)号：US08044490B2

    公开(公告)日：2011-10-25

    申请号：US12502490

    申请日：2009-07-14

    申请人： Seung-woo Shin ,  Byung-lyul Park ,  Jong-myeong Lee ,  Gil-heyun Choi ,  Jong-ho Yun

    发明人： Seung-woo Shin ,  Byung-lyul Park ,  Jong-myeong Lee ,  Gil-heyun Choi ,  Jong-ho Yun

    IPC分类号： H01L29/00 ,  H01L27/10

    CPC分类号： H01L23/5258 ,  H01L27/105 ,  H01L27/10894 ,  H01L27/10897 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided is a semiconductor device including a fuse, in which a insulating layer surrounding the fuse or metal wiring is prevented from being damaged due to the cut of a fuse, which can occur when a repair process is performed. The semiconductor device includes a conductive line formed on a semiconductor layer, a protective layer formed on the conductive line, one or more fuses that are electrically connected to the conductive line, and a fuse protective layer formed on the one or more fuses, and spaced apart from the protective layer.

    摘要翻译： 提供了一种包括保险丝的半导体器件，其中防止在保险丝或金属布线周围的绝缘层由于保险丝的切断而被损坏，这在维修过程中可能发生。 半导体器件包括形成在半导体层上的导电线，形成在导电线上的保护层，与导电线电连接的一个或多个保险丝，以及形成在一个或多个保险丝上的保险丝保护层， 除了保护层。

    Methods of forming semiconductor devices including landing pads formed by electroless plating
    7.
    发明授权
    Methods of forming semiconductor devices including landing pads formed by electroless plating 有权
    形成半导体器件的方法，包括通过无电镀形成的着陆焊盘

    公开(公告)号：US08497207B2

    公开(公告)日：2013-07-30

    申请号：US12829776

    申请日：2010-07-02

    申请人： Jong-ho Yun ,  Gil-heyun Choi ,  Jong-myeong Lee

    发明人： Jong-ho Yun ,  Gil-heyun Choi ,  Jong-myeong Lee

    IPC分类号： H01L21/00

    CPC分类号： H01L21/76895 ,  H01L21/288 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76879

    摘要： A semiconductor device in which an increase of contact resistance Rc between a metal contact and a plug due to misalignment between the metal contact and the plug can be reduced and the difficulty of a Cu filling process during the process of forming the plug may be reduced. The semiconductor device includes a substrate including an active area and a device isolation layer; a metal contact that is formed on the substrate and is electrically connected to the active area; a landing pad formed on the metal contact by electroless plating; and a plug that is formed on the landing pad and is electrically connected to the metal contact via the landing pad.

    摘要翻译： 可以减少由于金属接触和插塞之间的未对准而导致金属接触和插塞之间的接触电阻Rc增大的半导体器件，并且可以减少在形成插头的过程中Cu填充过程的困难。 半导体器件包括：衬底，其包括有源区和器件隔离层; 金属接触件，其形成在所述基板上并电连接到所述有源区域; 通过无电镀形成在金属接触件上的着陆垫; 以及形成在所述着陆板上并且经由所述着陆垫电连接到所述金属接触件的插头。

    Method of forming cobalt disilicide layer and method of manufacturing semiconductor device using the same
    9.
    发明授权
    Method of forming cobalt disilicide layer and method of manufacturing semiconductor device using the same 有权
    形成二硅化钴层的方法和使用其制造半导体器件的方法

    公开(公告)号：US07312150B2

    公开(公告)日：2007-12-25

    申请号：US10936853

    申请日：2004-09-09

    申请人： Jong-ho Yun ,  Gil-heyun Choi ,  Sang-bom Kang ,  Woong-hee Sohn ,  Hyun-su Kim

    发明人： Jong-ho Yun ,  Gil-heyun Choi ,  Sang-bom Kang ,  Woong-hee Sohn ,  Hyun-su Kim

    IPC分类号： H01L21/44

    CPC分类号： H01L21/324 ,  H01L21/28518 ,  H01L21/28556 ,  H01L21/76889 ,  H01L29/665 ,  H01L29/78

    摘要： A method of forming a cobalt disilicide layer and a method of manufacturing a semiconductor device using the same are provided. The method of forming a cobalt disilicide layer includes forming a cobalt layer on at least a silicon surface of a semiconductor device using metal organic chemical vapor deposition by supplying a cobalt precursor having a formula Co2(CO)6(R1—C≡C—R2), where R1 is H or CH3, and R2 is hydrogen, t-butyl, phenyl, methyl, or ethyl, as a source gas. Then, a capping layer is formed on the cobalt layer. A first thermal treatment is then performed on the semiconductor device in an ultra high vacuum, for example, under a pressure of 10−9-10−3 torr, to react silicon with cobalt. Cobalt unreacted during the first thermal treatment and the capping layer are then removed and a second thermal treatment is performed on the semiconductor device to form the cobalt disilicide (CoSi2) layer.

    摘要翻译： 提供了形成二硅化钴层的方法以及使用其制造半导体器件的方法。 形成二硅化钴层的方法包括使用金属有机化学气相沉积在半导体器件的至少硅表面上形成钴层，通过提供具有式CO 2（CO）2的钴前体， （R 1-C≡CR2），其中R 1是H或CH 3， / SUB，R 2是作为源气体的氢，叔丁基，苯基，甲基或乙基。 然后，在钴层上形成覆盖层。 然后在超高真空下，例如在10 -9 -10 -3托的压力下，在半导体器件上进行第一热处理，以使硅 与钴。 然后去除在第一热处理期间未反应的钴和覆盖层，并在半导体器件上进行第二热处理以形成二硅化钴（CoSi 2 N 2）层。