公开(公告)号：US08043913B2

公开(公告)日：2011-10-25

申请号：US13075091

申请日：2011-03-29

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L21/336

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A method of forming a field effect transistor includes: forming a trench in a semiconductor region; forming a shield electrode in the trench; performing an angled sidewall implant of impurities of the first conductivity type to form a channel enhancement region adjacent the trench; forming a body region of a second conductivity type in the semiconductor region; and forming a source region of the first conductivity type in the body region, the source region and an interface between the body region and the semiconductor region defining a channel region therebetween, the channel region extending along the trench sidewall. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region.

摘要翻译： 形成场效应晶体管的方法包括：在半导体区域中形成沟槽; 在沟槽中形成屏蔽电极; 执行第一导电类型的杂质的成角度的侧壁注入，以形成与沟槽相邻的沟道增强区域; 在半导体区域中形成第二导电类型的体区; 并且在所述体区域中形成所述第一导电类型的源极区域，所述源极区域和所述体区域与所述半导体区域之间的界面在所述体区域中形成沟道区域，所述沟道区域沿着所述沟槽侧壁延伸。 沟道增强区域部分地延伸到沟道区的下部，从而减小沟道区的电阻。

公开(公告)号：US20090230465A1

公开(公告)日：2009-09-17

申请号：US12404909

申请日：2009-03-16

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L29/772

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A field effect transistor includes a body region of a first conductivity type over a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminates within the semiconductor region. At least one conductive shield electrode is disposed in the gate trench. A gate electrode is disposed in the gate trench over but insulated from the at least one conductive shield electrode. A shield dielectric layer insulates the at lease one conductive shield electrode from the semiconductor region. A gate dielectric layer insulates the gate electrode from the body region. The shield dielectric layer is formed such that it flares out and extends directly under the body region.

摘要翻译： 场效应晶体管包括在第二导电类型的半导体区域上的第一导电类型的体区。 栅极沟槽延伸穿过身体区域并终止在半导体区域内。 至少一个导电屏蔽电极设置在栅极沟槽中。 栅极电极设置在栅极沟槽中，但与至少一个导电屏蔽电极绝缘。 屏蔽介电层绝缘至少一个导电屏蔽电极与半导体区域。 栅极电介质层使栅电极与体区绝缘。 屏蔽电介质层形成为使其伸出并直接延伸到身体区域下方。

公开(公告)号：US20080135931A1

公开(公告)日：2008-06-12

申请号：US12032123

申请日：2008-02-15

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridlay ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak S. Sanl ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridlay ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak S. Sanl ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region, source regions having the first conductivity type formed in the well region adjacent the active trench, and a first termination trench extending below the well region and disposed at an outer edge of an active region of the device. The sidewalls and bottom of the active trench are lined with dielectric material, and substantially filled with a first conductive layer forming an upper electrode and a second conductive layer forming a lower electrode, the upper electrode being disposed above the lower electrode and separated therefrom by inter-electrode dielectric material. The first termination trench can be lined with a layer of dielectric material that is thicker than the dielectric material lining the sidewalls of the active trench, and is substantially filled with conductive material.

摘要翻译： 半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并且具有与第一导电类型相反的第二导电类型的阱区域，延伸穿过阱区域并进入漂移区域的有源沟槽，源极区域 具有形成在邻近有源沟槽的阱区中的第一导电类型，以及在阱区下延伸并设置在器件的有源区的外边缘处的第一端接沟槽。 有源沟槽的侧壁和底部衬有介电材料，并且基本上填充有形成上电极的第一导电层和形成下电极的第二导电层，上电极设置在下电极之上， 电介质材料。 第一端接沟槽可以衬有一层电介质材料，其比在有源沟槽侧壁上的电介质材料更厚，并且基本上填充有导电材料。

公开(公告)号：US08013387B2

公开(公告)日：2011-09-06

申请号：US11964419

申请日：2007-12-26

申请人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

发明人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

IPC分类号： H01L29/76

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes active trenches that define an active area and an edge area that is located outside of the active area. The active trenches include a lower shield poly, an upper gate poly, a first oxide layer and a second oxide layer wherein the first oxide layer separates the lower shield poly from the upper gate poly and the second oxide layer covers the upper gate poly. The lower shield poly, upper gate poly, first oxide layer and second oxide layer conform to the shapo of the active trench and extend from the active trench to a surface of the edge area. The edge area includes a first opening that extends through the first oxide layer to the lower shield poly and a second opening that extends through the second oxide layer to the upper gate poly.

摘要翻译： 半导体功率器件包括有源沟槽，其限定有源区域和位于有源区域外部的边缘区域。 有源沟槽包括下屏蔽多晶硅，上栅极多晶硅，第一氧化物层和第二氧化物层，其中第一氧化物层将下屏蔽多晶硅与上栅极多晶硅分开，第二氧化物层覆盖上栅极聚合物。 下屏蔽多晶硅，上栅极多晶硅，第一氧化物层和第二氧化物层符合有源沟槽的形状并从有源沟槽延伸到边缘区域的表面。 边缘区域包括延伸穿过第一氧化物层到下屏蔽多孔体的第一开口和延伸穿过第二氧化物层到第二氧化物层的第二开口到上部栅极聚合物。

公开(公告)号：US07504303B2

公开(公告)日：2009-03-17

申请号：US11441386

申请日：2006-05-24

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L21/336

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A method for forming a shielded gate field effect transistor includes the following steps. Trenches extending into a silicon region are formed using a mask that includes a protective layer. A shield dielectric layer lining sidewalls and bottom of each trench is formed. A shield electrode is formed in a bottom portion of each trench. Protective spacers are formed along upper sidewalls of each trench. An inter-electrode dielectric is formed over the shield electrode. The protective spacers and the protective layer of the mask prevent formation of inter-electrode dielectric along the upper sidewalls of each trench and over mesa surfaces adjacent each trench. A gate electrode is formed in each trench over the inter-electrode dielectric.

摘要翻译： 一种用于形成屏蔽栅极场效应晶体管的方法包括以下步骤。 使用包括保护层的掩模形成延伸到硅区域中的沟槽。 形成在每个沟槽的侧壁和底部内衬的屏蔽电介质层。 屏蔽电极形成在每个沟槽的底部。 保护间隔物沿每个沟槽的上侧壁形成。 在屏蔽电极上形成电极间电介质。 保护间隔物和掩模的保护层防止沿着每个沟槽的上侧壁和与每个沟槽相邻的台面表面形成电极间电介质。 在电极间电介质的每个沟槽中形成栅电极。

公开(公告)号：US07416948B2

公开(公告)日：2008-08-26

申请号：US11551992

申请日：2006-10-23

申请人： Nathan L. Kraft ,  Ashok Challa ,  Steven P. Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean E. Probst ,  Rodney S. Ridley ,  Thomas E. Grebs ,  Christopher B. Kocon ,  Joseph A. Yedinak ,  Gary M. Dolny

发明人： Nathan L. Kraft ,  Ashok Challa ,  Steven P. Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean E. Probst ,  Rodney S. Ridley ,  Thomas E. Grebs ,  Christopher B. Kocon ,  Joseph A. Yedinak ,  Gary M. Dolny

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66734 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00

摘要： A field effect transistor is formed as follows. Trenches are formed in a semiconductor region of a first conductivity type. Each trench is partially filled with one or more materials. A dual-pass angled implant is carried out to implant dopants of a second conductivity type into the semiconductor region through an upper surface of the semiconductor region and through upper trench sidewalls not covered by the one or more material. A high temperature process is carried out to drive the implanted dopants deeper into the mesa region thereby forming body regions of the second conductivity type between adjacent trenches. Source regions of the first conductivity type are then formed in each body region.

摘要翻译： 场效应晶体管如下形成。 沟槽形成在第一导电类型的半导体区域中。 每个沟槽部分地填充有一种或多种材料。 执行双通角度注入以通过半导体区域的上表面和不被一种或多种材料覆盖的上沟槽侧壁将第二导电类型的掺杂剂注入半导体区域。 进行高温处理以将注入的掺杂剂更深地驱动到台面区域中，从而在相邻的沟槽之间形成第二导电类型的体区。 然后在每个身体区域中形成第一导电类型的源区域。

公开(公告)号：US20080150020A1

公开(公告)日：2008-06-26

申请号：US12018166

申请日：2008-01-22

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J. G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J. Y. Jung ,  H. C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J. G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J. Y. Jung ,  H. C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L29/78

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region. The active trench, which includes sidewalls and bottom lined with dielectric material, is substantially filled with a first conductive layer and a second conductive layer. The second conductive layer forms a gate electrode and is disposed above the first conductive layer and is separated from the first conductive layer by an inter-electrode dielectric material. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trench and a charge control trench that extends deeper into the drift region than the active trench and is substantially filled with material to allow for vertical charge control in the drift region. The charge control trench can be lined with a layer of dielectric material and substantially filled with conductive material. The active trench can include a second shield electrode made of conductive material disposed below the first shield electrode. The first conductive layer inside the active trench can form a secondary gate electrode that is configured to be electrically biased to a desired potential. The semiconductor device can also include a Schottky structure formed between the charge control trench and a second adjacent charge control trench.

摘要翻译： 半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并且具有与第一导电类型相反的第二导电类型的阱区域，延伸穿过阱区域并进入漂移区域的有源沟槽。 主要沟槽包括侧壁和衬底与介电材料的底部，其基本上被第一导电层和第二导电层填充。 第二导电层形成栅极，并且设置在第一导电层的上方，并且通过电极间电介质材料与第一导电层分离。 该器件还包括形成在阱区内并且邻近有源沟槽的第一导电类型的源极区域以及充电控制沟槽，该电荷控制沟槽比有源沟槽更深地延伸到漂移区域中，并且基本上填充有材料以允许垂直电荷控制 漂移区域。 电荷控制沟槽可以衬有介电材料层并且基本上填充有导电材料。 有源沟槽可以包括由设置在第一屏蔽电极下方的导电材料制成的第二屏蔽电极。 有源沟槽内的第一导电层可以形成辅助栅电极，其被配置为电偏置到期望的电位。 半导体器件还可以包括形成在电荷控制沟槽和第二相邻电荷控制沟槽之间的肖特基结构。

公开(公告)号：US08129245B2

公开(公告)日：2012-03-06

申请号：US13219281

申请日：2011-08-26

申请人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

发明人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

IPC分类号： H01L21/336

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first conductive layer away inside an active trench, forming a second oxide layer and second conductive layer. The second conductive layer does not extend completely over the first conductive layer in a first region outside of the active trench. The methods further include forming a third oxide layer over the second conductive layer, etching a first opening through the third oxide layer exposing the second conductive layer outside the active trench, etching a second opening through the second oxide layer outside the active trench in the first region exposing the first conductive layer but not the second conductive layer, and filling the first and second openings with conductive material.

摘要翻译： 制造功率半导体器件的方法包括形成外延和电介质层，图案化和蚀刻介电层，形成第一氧化物层，在第一氧化物层的顶部形成第一导电层，在有源沟槽内部蚀刻第一导电层 ，形成第二氧化物层和第二导电层。 第二导电层在有源沟槽外部的第一区域中不完全延伸到第一导电层上。 所述方法还包括在所述第二导电层上形成第三氧化物层，蚀刻通过所述第三氧化物层的第一开口，将所述第二导电层暴露于所述有源沟槽外部，在所述第一导电层中的所述有源沟槽外蚀刻穿过所述第二氧化物层的第二开口 区域暴露第一导电层而不暴露第二导电层，以及用导电材料填充第一和第二开口。

公开(公告)号：US20110177662A1

公开(公告)日：2011-07-21

申请号：US13075091

申请日：2011-03-29

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L21/336

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A method of forming a field effect transistor includes: forming a trench in a semiconductor region; forming a shield electrode in the trench; performing an angled sidewall implant of impurities of the first conductivity type to form a channel enhancement region adjacent the trench; forming a body region of a second conductivity type in the semiconductor region; and forming a source region of the first conductivity type in the body region, the source region and an interface between the body region and the semiconductor region defining a channel region therebetween, the channel region extending along the trench sidewall. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region.

摘要翻译： 形成场效应晶体管的方法包括：在半导体区域中形成沟槽; 在沟槽中形成屏蔽电极; 执行第一导电类型的杂质的成角度的侧壁注入，以形成与沟槽相邻的沟道增强区域; 在半导体区域中形成第二导电类型的体区; 并且在所述体区域中形成所述第一导电类型的源极区域，所述源极区域和所述体区域与所述半导体区域之间的界面在所述体区域中形成沟道区域，所述沟道区域沿着所述沟槽侧壁延伸。 沟道增强区域部分地延伸到沟道区的下部，从而减小沟道区的电阻。

公开(公告)号：US20100258862A1

公开(公告)日：2010-10-14

申请号：US12698746

申请日：2010-02-02

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A field effect transistor includes a body region of a first conductivity type in a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminating within the semiconductor region. A source region of the second conductivity type extends in the body region adjacent the gate trench. The source region and an interface between the body region and the semiconductor region define a channel region therebetween which extends along the gate trench sidewall. A channel enhancement region of the second conductivity type is formed adjacent the gate trench. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region.

摘要翻译： 场效应晶体管包括在第二导电类型的半导体区域中的第一导电类型的体区。 栅极沟槽延伸穿过身体区域并终止在半导体区域内。 第二导电类型的源极区域在与栅极沟槽相邻的体区中延伸。 源极区域和主体区域和半导体区域之间的界面限定其间沿着栅极沟槽侧壁延伸的沟道区域。 第二导电类型的沟道增强区域形成在栅极沟槽附近。 沟道增强区域部分地延伸到沟道区的下部，从而减小沟道区的电阻。