公开(公告)号：US07781803B2

公开(公告)日：2010-08-24

申请号：US12339814

申请日：2008-12-19

申请人： Jun Nishimura ,  Yoshiaki Asao

发明人： Jun Nishimura ,  Yoshiaki Asao

IPC分类号： H01L27/11

CPC分类号： H01L27/108 ,  H01L27/10802 ,  H01L29/7841

摘要： A semiconductor memory device comprising: a support substrate; an insulating film formed on the support substrate; a semiconductor film formed on the insulating film; a gate insulating film formed on the semiconductor film; a gate electrode film formed on the gate insulating film; and a source region and a drain region formed in the semiconductor film so as to sandwich the gate insulating film in a gate length direction, the source and drain regions contacting the insulating film at the bottom surface, and the semiconductor memory device storing data corresponding to the amount of charges accumulated in the semiconductor film surrounded by the insulating film, the gate insulating film, and the source and drain regions and electrically floated, wherein a border length between the source region and the gate insulating film contiguous to each other is different from a border length between the drain region and the gate insulating film to each other.

摘要翻译： 一种半导体存储器件，包括：支撑衬底; 形成在所述支撑基板上的绝缘膜; 形成在绝缘膜上的半导体膜; 形成在半导体膜上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极膜; 以及形成在所述半导体膜中的源极区域和漏极区域，以便在栅极长度方向夹着所述栅极绝缘膜，所述源极和漏极区域在所述底面处与所述绝缘膜接触，并且所述半导体存储器件存储对应于 在由绝缘膜，栅极绝缘膜以及源极和漏极区域包围的半导体膜中积累的电荷量被电浮动，其中源极区域和栅极绝缘膜彼此相邻的边界长度不同于 漏极区域和栅极绝缘膜之间的边界长度彼此。

公开(公告)号：US20090174007A1

公开(公告)日：2009-07-09

申请号：US12339814

申请日：2008-12-19

申请人： Jun NISHIMURA ,  Yoshiaki Asao

发明人： Jun NISHIMURA ,  Yoshiaki Asao

IPC分类号： H01L29/68

CPC分类号： H01L27/108 ,  H01L27/10802 ,  H01L29/7841

摘要： A semiconductor memory device comprising: a support substrate; an insulating film formed on the support substrate; a semiconductor film formed on the insulating film; a gate insulating film formed on the semiconductor film; a gate electrode film formed on the gate insulating film; and a source region and a drain region formed in the semiconductor film so as to sandwich the gate insulating film in a gate length direction, the source and drain regions contacting the insulating film at the bottom surface, and the semiconductor memory device storing data corresponding to the amount of charges accumulated in the semiconductor film surrounded by the insulating film, the gate insulating film, and the source and drain regions and electrically floated, wherein a border length between the source region and the gate insulating film contiguous to each other is different from a border length between the drain region and the gate insulating film to each other.

摘要翻译： 一种半导体存储器件，包括：支撑衬底; 形成在所述支撑基板上的绝缘膜; 形成在绝缘膜上的半导体膜; 形成在半导体膜上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极膜; 以及形成在所述半导体膜中的源极区域和漏极区域，以便在栅极长度方向夹着所述栅极绝缘膜，所述源极和漏极区域在所述底面处与所述绝缘膜接触，并且所述半导体存储器件存储对应于 在由绝缘膜，栅极绝缘膜以及源极和漏极区域包围的半导体膜中积累的电荷量被电浮动，其中源极区域和栅极绝缘膜彼此相邻的边界长度不同于 漏极区域和栅极绝缘膜之间的边界长度彼此。

公开(公告)号：US08941197B2

公开(公告)日：2015-01-27

申请号：US13370075

申请日：2012-02-09

申请人： Takeshi Kajiyama ,  Yoshiaki Asao

发明人： Takeshi Kajiyama ,  Yoshiaki Asao

IPC分类号： H01L27/22 ,  G11C11/16

CPC分类号： H01L43/08 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1675 ,  H01L27/222 ,  H01L27/228 ,  H01L43/02 ,  H01L43/10

摘要： A magnetic random access memory which is a memory cell array including a magnetoresistive effect element having a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is reversible, and a non-magnetic layer provided between the fixed layer and the recording layer, wherein all conductive layers in the memory cell array arranged below the magnetoresistive effect element are formed of materials each containing an element selected from a group including W, Mo, Ta, Ti, Zr, Nb, Cr, Hf, V, Co, and Ni.

摘要翻译： 一种磁性随机存取存储器，其是包括具有固定磁化方向的固定层的磁阻效应元件，其磁化方向可逆的记录层和设置在固定层与记录层之间的非磁性层的存储单元阵列 其中，布置在磁阻效应元件下方的存储单元阵列中的所有导电层由各自含有选自包括W，Mo，Ta，Ti，Zr，Nb，Cr，Hf，V，Co和 倪

公开(公告)号：US07920412B2

公开(公告)日：2011-04-05

申请号：US12605072

申请日：2009-10-23

申请人： Keiji Hosotani ,  Yoshiaki Asao ,  Akihiro Nitayama

发明人： Keiji Hosotani ,  Yoshiaki Asao ,  Akihiro Nitayama

IPC分类号： G11C11/00

CPC分类号： H01L27/228 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675

摘要： A magnetic random access memory includes a first wiring, a second wiring formed above and spaced apart from the first wiring, a magnetoresistive effect element formed between the first wiring and the second wiring, formed in contact with an upper surface of the first wiring, and having a fixed layer, a recording layer, and a nonmagnetic layer formed between the fixed layer and the recording layer, a metal layer formed on the magnetoresistive effect element and integrated with the magnetoresistive effect element to form stacked layers, a first side insulating film formed on side surfaces of the metal layer, the magnetoresistive effect element, and the first wiring, a first contact formed in contact with a side surface of the first side insulating film, and a third wiring formed on the metal layer and the first contact to electrically connect the magnetoresistive effect element and the first contact.

摘要翻译： 磁性随机存取存储器包括第一布线，形成在第一布线上方并与第一布线间隔开的第二布线;形成在与第一布线的上表面接触形成的第一布线和第二布线之间的磁阻效应元件，以及 具有形成在固定层和记录层之间的固定层，记录层和非磁性层，形成在磁阻效应元件上并与磁阻效应元件集成以形成堆叠层的金属层，形成第一侧绝缘膜 在金属层的侧表面，磁阻效应元件和第一布线，与第一侧绝缘膜的侧表面接触形成的第一触点和形成在金属层上的第三布线和第一触点电连接 连接磁阻效应元件和第一触点。

公开(公告)号：US07916522B2

公开(公告)日：2011-03-29

申请号：US12400262

申请日：2009-03-09

申请人： Kiyotaro Itagaki ,  Tsuneo Inaba ,  Yoshihiro Ueda ,  Yoshiaki Asao

发明人： Kiyotaro Itagaki ,  Tsuneo Inaba ,  Yoshihiro Ueda ,  Yoshiaki Asao

IPC分类号： G11C11/15

CPC分类号： G11C11/5607 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/75 ,  G11C2213/78

摘要： A semiconductor memory device includes n resistance change elements which are arranged in one cell, have a low-resistance state and a high resistance state, are connected in series or parallel, have different resistance values in the same resistance state, and change between the low-resistance state and the high-resistance state under different conditions, and a write circuit which is connected to one end of the n resistance change elements, and applies a pulse current m (1≦m≦n) times to the n resistance change elements during a write operation. Letting Im be a current value of an mth pulse current, condition I1>I2> . . . >Im holds.

摘要翻译： 半导体存储器件包括在一个单元中布置的具有低电阻状态和高电阻状态的n个电阻变化元件串联或并联连接，在相同电阻状态下具有不同的电阻值，并且在低电平 电阻状态和不同条件下的高电阻状态，以及与n个电阻变化元件的一端连接的写入电路，并向n个电阻变化元件施加脉冲电流m（1＆nlE; m＆nlE; n）次 在写操作期间。 令Im为第m个脉冲电流的当前值，条件I1> I2>。 。 。 > Im持有。

公开(公告)号：US07869259B2

公开(公告)日：2011-01-11

申请号：US12406898

申请日：2009-03-18

申请人： Yoshiaki Asao

发明人： Yoshiaki Asao

IPC分类号： G11C11/00

CPC分类号： G11C13/0069 ,  G11C13/0002 ,  G11C13/0097 ,  G11C16/0466 ,  G11C2013/0078 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/165

摘要： A resistance change memory includes a first interconnection, a second interconnection, a first resistance change element which has a first electrode, a second electrode, and a first tunnel insulating film provided between the first electrode and the second electrode, the first tunnel insulating film including a first trap region formed by introducing defects to trap holes or electrons, and the second electrode being connected to the first interconnection, and a first transistor whose current path has one end connected to the first electrode and the other end connected to the second interconnection.

摘要翻译： 电阻变化存储器包括第一互连，第二互连，第一电阻改变元件，其具有设置在第一电极和第二电极之间的第一电极，第二电极和第一隧道绝缘膜，第一隧道绝缘膜包括 通过引入缺陷以捕获空穴或电子而形成的第一陷阱区域，以及第二电极连接到第一互连件，以及第一晶体管，其电流通路的一端连接到第一电极，而另一端连接到第二互连。

公开(公告)号：US20080225577A1

公开(公告)日：2008-09-18

申请号：US12043617

申请日：2008-03-06

申请人： Keiji HOSOTANI ,  Yoshiaki Asao ,  Toshihiko Nagase

发明人： Keiji HOSOTANI ,  Yoshiaki Asao ,  Toshihiko Nagase

IPC分类号： G11C11/02 ,  H01L29/82 ,  H01L21/00 ,  G11C7/00

CPC分类号： G11C11/16 ,  B82Y10/00 ,  G11C11/1675 ,  H01L27/22 ,  H01L27/228 ,  H01L43/08

摘要： A magnetic random access memory includes a bit line running in a first direction, a first word line running in a second direction different from the first direction, and a memory element having a magnetoresistive effect element including a fixed layer having a fixed magnetization direction, a recording layer having a reversible magnetization direction, and a nonmagnetic layer formed between the fixed layer and the recording layer, the magnetization directions in the fixed layer and the recording layer being perpendicular to a film surface, and a heater layer in contact with the magnetoresistive effect element, the memory element being connected to the bit line, and formed to oppose a side surface of the first word line such that the memory element is insulated from the first word line.

摘要翻译： 磁性随机存取存储器包括沿第一方向运行的位线，沿与第一方向不同的第二方向运行的第一字线，以及具有包括具有固定磁化方向的固定层的磁阻效应元件的存储元件， 具有可逆磁化方向的记录层和形成在固定层和记录层之间的非磁性层，固定层和记录层中的磁化方向垂直于膜表面，以及与磁阻效应接触的加热器层 所述存储元件连接到所述位线，并形成为与所述第一字线的侧表面相对，使得所述存储元件与所述第一字线绝缘。

公开(公告)号：US20080151608A1

公开(公告)日：2008-06-26

申请号：US11959897

申请日：2007-12-19

申请人： Keiji HOSOTANI ,  Yoshiaki Asao

发明人： Keiji HOSOTANI ,  Yoshiaki Asao

IPC分类号： G11C11/00

CPC分类号： G11C11/16 ,  G11C11/1675 ,  G11C2213/75 ,  Y10S977/935

摘要： A semiconductor memory device includes first to fourth resistance change elements sequentially arranged apart from each other in a first direction, a first electrode which connects one terminals of the first and second resistance change elements, a second electrode which connects one terminals of the third and fourth resistance change elements, a bit line which connects the other terminals of the second and third resistance change elements, first to fourth word lines respectively paired with the first to fourth resistance change elements, arranged apart from the first and second electrodes, and running in a second direction, a first current source which supplies a first electric current to a chain structure, when writing data in a selected element, and a second current source which supplies a second electric current to a selected word line which corresponds to the selected element, when writing the data in the selected element.

摘要翻译： 一种半导体存储器件，包括：沿第一方向相互顺序排列的第一至第四电阻变化元件;连接第一和第二电阻变化元件的一个端子的第一电极;连接第三和第四电极的一个端子的第二电极; 电阻变化元件，连接第二和第三电阻变化元件的其他端子的位线，与第一和第四电阻变化元件分别配对的第一至第四字线与第一和第二电极分开配置，并且以 第二方向，当将数据写入所选择的元件时，将第一电流提供给链结构的第一电流源和向对应于所选择的元件的所选择的字线提供第二电流的第二电流源， 在所选元素中写入数据。

公开(公告)号：US07376003B2

公开(公告)日：2008-05-20

申请号：US10465616

申请日：2003-06-20

申请人： Yoshihisa Iwata ,  Yoshiaki Asao ,  Kentaro Nakajima

发明人： Yoshihisa Iwata ,  Yoshiaki Asao ,  Kentaro Nakajima

IPC分类号： G11C11/00

CPC分类号： G11C11/16

摘要： A magnetic field H1 in the hard-axis direction and a magnetic field H2 in the easy-axis direction are caused to simultaneously act on a MTJ element having an ideal asteroid curve, thereby reversing the magnetizing direction of the storing layer of the MTJ element. When the actual asteroid curve shifts in the hard-axis direction by Ho, a corrected synthesized magnetic field ({right arrow over (H1)}+{right arrow over (H2)}+{right arrow over (Ho)}) is generated in write operation to reliably reverse the magnetizing direction. The corrected synthesized magnetic field can easily be generated by individually controlling a write word/bit line current on the basis of programmed setting data.

摘要翻译： 使硬轴方向的磁场H 1和易轴方向的磁场H 2同时作用于具有理想的小行星曲线的MTJ元件，从而使MTJ的存储层的磁化方向反转 元件。 当实际的小行星曲线在硬轴方向上移动Ho时，产生校正的合成磁场（{H 1}} + {右箭头（H 2）} +（向右箭头（Ho））上的右箭头 在写入操作中可靠地反转磁化方向，通过基于编程的设置数据单独地控制写入字/位线电流，可以容易地产生校正的合成磁场。

公开(公告)号：US20070187801A1

公开(公告)日：2007-08-16

申请号：US11397726

申请日：2006-04-05

申请人： Yoshiaki Asao ,  Akihiro Nitayama

发明人： Yoshiaki Asao ,  Akihiro Nitayama

IPC分类号： H01L29/12 ,  H01L31/117

CPC分类号： H01L45/144 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1286

摘要： A semiconductor device comprising a semiconductor substrate, a switching element which is provided on the semiconductor substrate, a first interconnect layer which is provided above the semiconductor substrate, a plurality of phase-change memory devices which have phase-change material whose resistance changes by a phase-change due to a temperature change, being stacked, and being connected in series to the first interconnect layer and the switching element, a plurality of first heating elements which are connected in series to the respective phase-change memory devices, and a plurality of second heating elements which are connected to second interconnect layers different from the first interconnect layer, and which are provided so as to correspond to the respective phase-change memory devices.

摘要翻译： 一种半导体器件，包括半导体衬底，设置在所述半导体衬底上的开关元件，设置在所述半导体衬底上方的第一互连层，具有相变材料的多个相变存储器件，所述相变材料的电阻改变为 由于温度变化引起的相变，被堆叠并串联连接到第一互连层和开关元件，多个第一加热元件串联连接到各个相变存储器件，以及多个 第二加热元件连接到与第一互连层不同的第二互连层，并且被设置为对应于各个相变存储器件。