COMPOUND SEMICONDUCTORS AND THEIR APPLICATION
    3.
    发明申请
    COMPOUND SEMICONDUCTORS AND THEIR APPLICATION 有权
    化合物半导体及其应用

    公开(公告)号:US20130009106A1

    公开(公告)日:2013-01-10

    申请号:US13616679

    申请日:2012-09-14

    摘要: Disclosed are new compound semiconductors which may be used for solar cells or as thermoelectric materials, and their application. The compound semiconductor may be represented by a chemical formula: InxCo4Sb12-n-zQ′nTez, where Q′ is at least one selected from the group consisting of O, S and Se, 0

    摘要翻译: 公开了可用于太阳能电池或作为热电材料的新型化合物半导体及其应用。 化合物半导体可以由化学式:In x Co 4 Sb 12 -n-z Q'nTez表示,其中Q'是选自O,S和Se中的至少一种,0

    NAND TYPE FLASH MEMORY ARRAY AND METHOD FOR OPERATING THE SAME
    5.
    发明申请
    NAND TYPE FLASH MEMORY ARRAY AND METHOD FOR OPERATING THE SAME 有权
    NAND型闪存存储器阵列及其操作方法

    公开(公告)号:US20060279991A1

    公开(公告)日:2006-12-14

    申请号:US11423691

    申请日:2006-06-12

    IPC分类号: G11C16/04

    CPC分类号: G11C16/0483 H01L27/115

    摘要: A NAND type flash memory array which is composed of a plurality of memory cells with a shallow junction on an SOI substrate to make the body region depleted fully when each channel of the memory cells is turned on is provided. The invention improves the efficiency of a reading operation, enables an erasing operation on the SOI structure and enables use of a low voltage VPASS instead of a high voltage VPASS, which is used for a programming operation in a conventional NAND type flash memory array, and therefore it diminishes programming disturbance more effectively than a conventional array.

    摘要翻译: 提供一种NAND型闪速存储器阵列,其由在SOI衬底上具有浅结的多个存储单元组成,以在存储器单元的每个通道被接通时使身体区域完全耗尽。 本发明提高了读取操作的效率,使得能够对SOI结构进行擦除操作,并且能够使用低电压VASS PASS而不是高电压VASS PASS 用于常规NAND型闪存阵列中的编程操作,因此与常规阵列相比,可以更有效地减少编程干扰。

    3D FACE MODEL RECONSTRUCTION APPARATUS AND METHOD
    6.
    发明申请
    3D FACE MODEL RECONSTRUCTION APPARATUS AND METHOD 有权
    3D脸部模型重建装置和方法

    公开(公告)号:US20160275721A1

    公开(公告)日:2016-09-22

    申请号:US14443337

    申请日:2014-06-20

    IPC分类号: G06T17/20 G06K9/00

    摘要: Apparatuses, methods and storage medium associated with 3D face model reconstruction are disclosed herein. In embodiments, an apparatus may include a facial landmark detector, a model fitter and a model tracker. The facial landmark detector may be configured to detect a plurality of landmarks of a face and their locations within each of a plurality of image frames. The model fitter may be configured to generate a 3D model of the face from a 3D model of a neutral face, in view of detected landmarks of the face and their locations within a first one of the plurality of image frames. The model tracker may be configured to maintain the 3D model to track the face in subsequent image frames, successively updating the 3D model in view of detected landmarks of the face and their locations within each of successive ones of the plurality of image frames. In embodiments, the facial landmark detector may include a face detector, an initial facial landmark detector, and one or more facial landmark detection linear regressors. Other embodiments may be described and/or claimed.

    摘要翻译: 本文公开了与3D脸部模型重建相关联的装置,方法和存储介质。 在实施例中,装置可以包括面部地标检测器,模型装配器和模型跟踪器。 面部地标检测器可以被配置为检测面部的多个界标及其在多个图像帧的每一个内的位置。 考虑到检测到的面部的标记及其在多个图像帧的第一个图像帧中的位置,模型拟合器可以被配置为从中立面的3D模型生成面部的3D模型。 模型跟踪器可以被配置为维持3D模型以跟踪后续图像帧中的面部,从而考虑到检测到的面部的界标及其在多个图像帧中的每个连续图像帧中的位置之间的连续更新3D模型。 在实施例中,面部地标检测器可以包括面部检测器,初始面部地标检测器和一个或多个面部地标检测线性回归器。 可以描述和/或要求保护其他实施例。

    COMPOUND SEMICONDUCTORS AND THEIR APPLICATION
    7.
    发明申请
    COMPOUND SEMICONDUCTORS AND THEIR APPLICATION 有权
    化合物半导体及其应用

    公开(公告)号:US20130015412A1

    公开(公告)日:2013-01-17

    申请号:US13617572

    申请日:2012-09-14

    IPC分类号: H01B1/06

    摘要: Disclosed are new compound semiconductors which may be used for solar cells or as thermoelectric materials, and their application. The compound semiconductor may be represented by a chemical formula: InxMyCo4-mAmSb12-n-zXnTez, where M is at least one selected from the group consisting of Ca, Sr, Ba, Ti, V, Cr, Mn, Cu, Zn, Pd, Ag, Cd, Sc, Y, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, A is at least one selected from the group consisting of Fe, Ni, Ru, Rh, Pd, Ir and Pt, X is at least one selected from the group consisting of Si, Ga, Ge and Sn, 0

    摘要翻译: 公开了可用于太阳能电池或作为热电材料的新型化合物半导体及其应用。 化合物半导体可以由化学式:In x M y Co 4-mA m Sb 12 -n-z X n Te z表示,其中M是选自Ca,Sr,Ba,Ti,V,Cr,Mn,Cu,Zn,Pd ,Ag,Cd,Sc,Y,La,Ce,Pr,Nd,Sm,Eu,Gd,Tb,Dy,Ho,Er,Tm,Yb和Lu中的至少一种,A是选自Fe, Ni,Ru,Rh,Pd,Ir和Pt中的至少一种,X是选自Si,Ga,Ge和Sn中的至少一种,0

    METHOD FOR CONSTRUCTING PRECAST COPING FOR BRIDGE
    8.
    发明申请
    METHOD FOR CONSTRUCTING PRECAST COPING FOR BRIDGE 失效
    用于构造桥梁预制复合的方法

    公开(公告)号:US20110278752A1

    公开(公告)日:2011-11-17

    申请号:US12900572

    申请日:2010-10-08

    IPC分类号: E04B1/18

    CPC分类号: E01D19/00 E01D21/00

    摘要: The method for constructing precast coping for bridge of the present invention enables to manufacture a segment match-cast manufactured with the top of a pier body; to be applied to small and medium size bridges by introducing transverse tendon force to each segment through tendons after manufacturing a subsegment which is match cast to both sides of the pre-made segment; to be rapidly produced; and to retension tendons when the coping is constructed by using a plurality of segments. Further, the method for constructing precast coping for bridge of the present invention enables to manufacture the method for constructing precast coping for bridge, enabling to obtain stability towards lift by easily lifting the coping, assembled on the ground, through lifting lugs by forming lifting lugs on the top upon manufacturing segments.

    摘要翻译: 本发明的桥梁预制构件的制造方法能够制造由墩体的顶部制造的片段搭配; 通过在制造与预制段的两侧相匹配的子段之后通过筋将横向筋力引入到中小型桥梁中; 快速生产; 以及当通过使用多个段来构建应对时的延续筋。 此外,本发明的桥梁预制构件的制造方法能够制造桥梁的预制拱顶的方法,能够通过提升凸耳通过提升凸耳容易地提升组装在地面上的应力来获得对提升的稳定性 在制造部门的顶部。

    METHOD FOR PRODUCING METAL NANOPARTICLES AND METAL NANOPARTICLES PRODUCED THEREBY
    9.
    发明申请
    METHOD FOR PRODUCING METAL NANOPARTICLES AND METAL NANOPARTICLES PRODUCED THEREBY 失效
    生产金属纳米颗粒的方法和生产的金属纳米颗粒

    公开(公告)号:US20080207934A1

    公开(公告)日:2008-08-28

    申请号:US11940049

    申请日:2007-11-14

    摘要: The present invention relates to a method for producing metal nanoparticles and metal nanoparticles produced thereby, in particular, to a method for producing metal nanoparticles used for inkjet that comprises, preparing metal nanoparticles capped with a fatty acid; heating a mixture of the capped metal nanoparticles and a linear or branched first amine of C1-C7 so that a part of the fatty acid is substituted to the first amine; and heating after adding a linear or branched second amine of C8-C20 to the mixture so that the first amine is re-substituted to the second amine. According to the present invention, metal nanoparticles capped with 2 kinds of dispersants can be produced massively, and its application to ink for inkjet technique can lower the curing temperature of ink.

    摘要翻译: 本发明涉及一种生产金属纳米粒子的方法及其制备的金属纳米粒子,特别涉及用于生产用于喷墨的金属纳米粒子的方法,该方法包括:制备用脂肪酸封端的金属纳米粒子; 加热封端的金属纳米颗粒和C1-C7的直链或支链的第一胺的混合物,使得一部分脂肪酸被第一胺取代; 并在将C 8 -C 20 -C 20的直链或支链的第二胺加入混合物中加热,使得第一胺被重新取代成第二胺。 根据本发明,可以大量生产用2种分散剂覆盖的金属纳米颗粒,并且其用于喷墨技术的墨水可以降低油墨的固化温度。

    MEMORY CELL OF SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME
    10.
    发明申请
    MEMORY CELL OF SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME 有权
    半导体存储器件的存储单元及其驱动方法

    公开(公告)号:US20130182518A1

    公开(公告)日:2013-07-18

    申请号:US13461186

    申请日:2012-05-01

    IPC分类号: G11C29/00 G11C7/12 G11C17/16

    摘要: A semiconductor memory device includes a first fuse having one end coupled with a first bit line and configured to be programmed with a data, a second fuse having one end coupled with a second bit line and configured to be programmed with the data; a program controller coupled with the other ends of the first fuse and the second fuse and configured to perform a program operation on at least one of the first fuse and the second fuse in response to a program voltage, and a read controller coupled with the other ends of the first fuse and the second fuse and configured to perform a read operation on the first fuse and the second fuse in response to a read voltage.

    摘要翻译: 半导体存储器件包括:第一熔丝,其一端与第一位线耦合并且被配置为对数据进行编程;第二熔丝,其一端与第二位线耦合并且被配置为对所述数据进行编程; 与第一熔丝和第二熔丝的另一端耦合的程序控制器,并且被配置为响应于编程电压对第一熔丝和第二熔丝中的至少一个进行编程操作,以及与另一个耦合的读控制器 第一熔丝和第二熔丝的端部,并且被配置为响应于读取电压对第一熔丝和第二熔丝执行读取操作。