公开(公告)号：US20060022321A1

公开(公告)日：2006-02-02

申请号：US11190011

申请日：2005-07-27

申请人： Kazuhito Matsukawa ,  Tsuyoshi Koga ,  Akio Nishida ,  Yoshiko Higashide ,  Jun Shibata ,  Hiroshi Tobimatsu

发明人： Kazuhito Matsukawa ,  Tsuyoshi Koga ,  Akio Nishida ,  Yoshiko Higashide ,  Jun Shibata ,  Hiroshi Tobimatsu

IPC分类号： H01L21/50 ,  H01L23/02

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： In a semiconductor chip A wherein an element layer 2 having transistors and the like is formed on the front face, and the back face is joined to an underlying member, such as a package substrate, the thickness T is made 100 μm or less, and thereafter, a gettering layer 3 is formed on the back face of the semiconductor chip A. The gettering layer 3 is formed, for example, by polishing the back face of said semiconductor chip A using a polishing machine. Thereby, the yield of devices can be improved in the step for assembling the package.

公开(公告)号：US07582950B2

公开(公告)日：2009-09-01

申请号：US11190011

申请日：2005-07-27

申请人： Kazuhito Matsukawa ,  Tsuyoshi Koga ,  Akio Nishida ,  Yoshiko Higashide ,  Jun Shibata ,  Hiroshi Tobimatsu

发明人： Kazuhito Matsukawa ,  Tsuyoshi Koga ,  Akio Nishida ,  Yoshiko Higashide ,  Jun Shibata ,  Hiroshi Tobimatsu

IPC分类号： H01L29/06

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： In a semiconductor chip A wherein an element layer 2 having transistors and the like is formed on the front face, and the back face is joined to an underlying member, such as a package substrate, the thickness T is made 100 μm or less, and thereafter, a gettering layer 3 is formed on the back face of the semiconductor chip A. The gettering layer 3 is formed, for example, by polishing the back face of said semiconductor chip A using a polishing machine. Thereby, the yield of devices can be improved in the step for assembling the package.

摘要翻译： 在半导体芯片A中，其中在正面上形成具有晶体管等的元件层2，并且背面与诸如封装基板的底层部件接合，厚度T为100μm以下， 此后，在半导体芯片A的背面上形成吸气层3.吸气层3例如通过使用研磨机对所述半导体芯片A的背面进行研磨而形成。 因此，在组装包装的步骤中可以提高装置的产量。

公开(公告)号：US20090286354A1

公开(公告)日：2009-11-19

申请号：US12508775

申请日：2009-07-24

申请人： KAZUHITO MATSUKAWA ,  Tsuyoshi Koga ,  Akio Nishida ,  Yoshiko Higashide ,  Jun Shibata ,  Hiroshi Tobimatsu

发明人： KAZUHITO MATSUKAWA ,  Tsuyoshi Koga ,  Akio Nishida ,  Yoshiko Higashide ,  Jun Shibata ,  Hiroshi Tobimatsu

IPC分类号： H01L21/98 ,  H01L21/78

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： In a semiconductor chip A wherein an element layer 2 having transistors and the like is formed on the front face, and the back face is joined to an underlying member, such as a package substrate, the thickness T is made 100 μm or less, and thereafter, a gettering layer 3 is formed on the back face of the semiconductor chip A. The gettering layer 3 is formed, for example, by polishing the back face of said semiconductor chip A using a polishing machine. Thereby, the yield of devices can be improved in the step for assembling the package.

摘要翻译： 在半导体芯片A中，其中在正面上形成具有晶体管等的元件层2，并且背面与诸如封装基板的底层部件接合，厚度T为100μm以下， 此后，在半导体芯片A的背面上形成吸气层3.吸气层3例如通过使用研磨机对所述半导体芯片A的背面进行研磨而形成。 因此，在组装包装的步骤中可以提高装置的产量。

公开(公告)号：US07939448B2

公开(公告)日：2011-05-10

申请号：US12888995

申请日：2010-09-23

申请人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

发明人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

IPC分类号： H01L21/311

CPC分类号： H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792

摘要： A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.

摘要翻译： 半导体器件的制造方法包括：第一电极形成步骤，在控制栅电极和半导体衬底之间形成控制栅极电极，该控制栅电极在半导体衬底的表面上方，控制栅绝缘膜，形成存储节点 绝缘膜，以及在存储节点绝缘膜的表面上形成存储栅电极的第二电极形成步骤。 第二电极形成步骤包括在存储节点绝缘膜的表面上形成存储栅极电极层的步骤，在表面上形成蚀刻速率慢于存储栅电极层的蚀刻速率的辅助膜的步骤 的存储栅电极层和对存储栅电极层和辅助膜进行各向异性蚀刻的步骤。

公开(公告)号：US20120122246A1

公开(公告)日：2012-05-17

申请号：US13353004

申请日：2012-01-18

申请人： Kazuyuki MISUMI ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

发明人： Kazuyuki MISUMI ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

IPC分类号： H01L21/8246

CPC分类号： H01L43/12 ,  H01L23/552 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L27/228 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

摘要翻译： 一种制造磁存储器芯片器件的方法包括以下步骤：在形成在硅晶片上的多个磁存储器芯片中的每一个中写入信息; 在写入信息之后，在硅晶片的背面上粘附高磁导率板，高磁导率板具有比硅更高的磁导率并且具有50μm以上的厚度; 在粘附高磁导率板之后，将硅晶片切割成各自的磁存储芯片。

公开(公告)号：US08124425B2

公开(公告)日：2012-02-28

申请号：US12525999

申请日：2008-02-21

申请人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

发明人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

IPC分类号： H01L21/00

CPC分类号： H01L43/12 ,  H01L23/552 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L27/228 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 μm or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

摘要翻译： 一种制造磁存储器芯片器件的方法包括以下步骤：在形成在硅晶片上的多个磁存储器芯片中的每一个中写入信息; 在写入信息之后，在硅晶片的背面上粘附高磁导率板，高磁导率板具有比硅更高的磁导率并且具有50μm以上的厚度; 在粘附高磁导率板之后，将硅晶片切割成各自的磁存储芯片。

公开(公告)号：US20100120176A1

公开(公告)日：2010-05-13

申请号：US12525999

申请日：2008-02-21

申请人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tasuhiko Akiyama ,  Tomohiro Murakami

发明人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tasuhiko Akiyama ,  Tomohiro Murakami

IPC分类号： H01L21/00

CPC分类号： H01L43/12 ,  H01L23/552 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L27/228 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method for manufacturing a magnetic memory chip device is provided with a step of writing information on a plurality of magnetic memory chips formed on a silicon wafer; a step of adhering a high permeability plate, which is composed of a material having permeability higher than that of silicon and has a thickness of 50 μm or more, on the rear surface of a silicon wafer after writing the information; and a step of dicing the silicon wafer into magnetic memory chips after adhering the high permeability plate.

摘要翻译： 一种用于制造磁存储器芯片器件的方法，具有在形成于硅晶片上的多个磁存储器芯片上写入信息的步骤; 在写入信息之后，在硅晶片的后表面上粘附由具有高于硅的磁导率并且具有50μm以上的厚度的材料构成的高透光性板的步骤; 以及在粘附高磁导率板之后将硅晶片切割成磁存储芯片的步骤。

公开(公告)号：US20070164342A1

公开(公告)日：2007-07-19

申请号：US11651965

申请日：2007-01-11

申请人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada ,  Masamichi Matsuoka

发明人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada ,  Masamichi Matsuoka

IPC分类号： H01L29/76

CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114

摘要： A polysilicon film forming a memory gate interconnection and the like includes a part extending from a part positioned on one side surface of a control gate interconnection to a side opposite to a side where the control gate interconnection is positioned, and that part serves as a pad portion. A contact hole is formed to expose the pad portion. The height of a part of the polysilicon film that is positioned on one side surface of the control gate interconnection is set equal to or lower than the height of the control gate interconnection so that the polysilicon film forming a memory gate interconnection and the like does not two-dimensionally overlap the control gate interconnection. Therefore, a semiconductor memory device with increased process margin can be obtained.

摘要翻译： 形成存储器栅互连等的多晶硅膜包括从位于控制栅互连的一个侧表面上的部分延伸到与控制栅互连的一侧相对的一侧的部分，并且该部分用作焊盘 一部分。 形成接触孔以露出焊盘部分。 位于控制栅极互连的一个侧面上的多晶硅膜的一部分的高度设定为等于或低于控制栅极互连的高度，使得形成存储器栅互连等的多晶硅膜不会 二维重叠控制门互连。 因此，可以获得具有增加的工艺裕量的半导体存储器件。

公开(公告)号：US08524510B2

公开(公告)日：2013-09-03

申请号：US13353004

申请日：2012-01-18

申请人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

发明人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

IPC分类号： H01L21/00 ,  H01L21/30

CPC分类号： H01L43/12 ,  H01L23/552 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L27/228 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

摘要翻译： 一种制造磁存储器芯片器件的方法包括以下步骤：在形成在硅晶片上的多个磁存储器芯片中的每一个中写入信息; 在写入信息之后，在硅晶片的背面上粘附高磁导率板，高磁导率板具有比硅更高的磁导率并且具有50μm以上的厚度; 在粘附高磁导率板之后，将硅晶片切割成各自的磁存储芯片。

公开(公告)号：US20110049454A1

公开(公告)日：2011-03-03

申请号：US12305890

申请日：2006-06-23

申请人： Motoyasu Terao ,  Yuichi Matsui ,  Tsuyoshi Koga ,  Nozomu Matsuzaki ,  Norikatsu Takaura ,  Yoshihisa Fujisaki ,  Kenzo Kurotsuchi ,  Takahiro Morikawa ,  Yoshitaka Sasago ,  Junko Ushiyama ,  Akemi Hirotsune

发明人： Motoyasu Terao ,  Yuichi Matsui ,  Tsuyoshi Koga ,  Nozomu Matsuzaki ,  Norikatsu Takaura ,  Yoshihisa Fujisaki ,  Kenzo Kurotsuchi ,  Takahiro Morikawa ,  Yoshitaka Sasago ,  Junko Ushiyama ,  Akemi Hirotsune

IPC分类号： H01L45/00

CPC分类号： H01L45/1675 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144

摘要： In a phase-change memory, an interface layer is inserted between a chalcogenide material layer and a plug. The interface layer is arranged so as not to cover the entire interface of a plug-like electrode. When the plug is formed at an upper part than the chalcogenide layer, the degree of integration is increased. The interface layer is formed by carrying out sputtering using an oxide target, or, by forming a metal film by carrying out sputtering using a metal target followed by oxidizing the metal film in an oxidation atmosphere such as oxygen radical, oxygen plasma, etc.

摘要翻译： 在相变存储器中，界面层插入硫族化物材料层和插塞之间。 界面层被布置成不覆盖插塞状电极的整个界面。 当塞子形成在比硫族化物层的上部时，积分度增加。 通过使用氧化物靶进行溅射而形成界面层，或者通过使用金属靶进行溅射而形成金属膜，然后在氧自由基，氧等离子体等的氧化气氛中氧化金属膜。