公开(公告)号：US20070164342A1

公开(公告)日：2007-07-19

申请号：US11651965

申请日：2007-01-11

申请人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada ,  Masamichi Matsuoka

发明人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada ,  Masamichi Matsuoka

IPC分类号： H01L29/76

CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114

摘要： A polysilicon film forming a memory gate interconnection and the like includes a part extending from a part positioned on one side surface of a control gate interconnection to a side opposite to a side where the control gate interconnection is positioned, and that part serves as a pad portion. A contact hole is formed to expose the pad portion. The height of a part of the polysilicon film that is positioned on one side surface of the control gate interconnection is set equal to or lower than the height of the control gate interconnection so that the polysilicon film forming a memory gate interconnection and the like does not two-dimensionally overlap the control gate interconnection. Therefore, a semiconductor memory device with increased process margin can be obtained.

摘要翻译： 形成存储器栅互连等的多晶硅膜包括从位于控制栅互连的一个侧表面上的部分延伸到与控制栅互连的一侧相对的一侧的部分，并且该部分用作焊盘 一部分。 形成接触孔以露出焊盘部分。 位于控制栅极互连的一个侧面上的多晶硅膜的一部分的高度设定为等于或低于控制栅极互连的高度，使得形成存储器栅互连等的多晶硅膜不会 二维重叠控制门互连。 因此，可以获得具有增加的工艺裕量的半导体存储器件。

公开(公告)号：US07939448B2

公开(公告)日：2011-05-10

申请号：US12888995

申请日：2010-09-23

申请人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

发明人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

IPC分类号： H01L21/311

CPC分类号： H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792

摘要： A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.

摘要翻译： 半导体器件的制造方法包括：第一电极形成步骤，在控制栅电极和半导体衬底之间形成控制栅极电极，该控制栅电极在半导体衬底的表面上方，控制栅绝缘膜，形成存储节点 绝缘膜，以及在存储节点绝缘膜的表面上形成存储栅电极的第二电极形成步骤。 第二电极形成步骤包括在存储节点绝缘膜的表面上形成存储栅极电极层的步骤，在表面上形成蚀刻速率慢于存储栅电极层的蚀刻速率的辅助膜的步骤 的存储栅电极层和对存储栅电极层和辅助膜进行各向异性蚀刻的步骤。

公开(公告)号：US07816207B2

公开(公告)日：2010-10-19

申请号：US12719524

申请日：2010-03-08

申请人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

发明人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

IPC分类号： H01L21/336

CPC分类号： H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792

摘要： A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.

摘要翻译： 半导体器件的制造方法包括：第一电极形成步骤，在控制栅电极和半导体衬底之间形成控制栅极电极，该控制栅电极在半导体衬底的表面上方，控制栅绝缘膜，形成存储节点 绝缘膜，以及在存储节点绝缘膜的表面上形成存储栅电极的第二电极形成步骤。 第二电极形成步骤包括在存储节点绝缘膜的表面上形成存储栅极电极层的步骤，在表面上形成蚀刻速率慢于存储栅电极层的蚀刻速率的辅助膜的步骤 的存储栅电极层和对存储栅电极层和辅助膜进行各向异性蚀刻的步骤。

公开(公告)号：US07709874B2

公开(公告)日：2010-05-04

申请号：US11649208

申请日：2007-01-04

申请人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

发明人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

IPC分类号： H01L29/94

CPC分类号： H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792

摘要： A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.

摘要翻译： 半导体器件的制造方法包括：第一电极形成步骤，在控制栅电极和半导体衬底之间形成控制栅极电极，该控制栅电极在半导体衬底的表面上方，控制栅绝缘膜，形成存储节点 绝缘膜，以及在存储节点绝缘膜的表面上形成存储栅电极的第二电极形成步骤。 第二电极形成步骤包括在存储节点绝缘膜的表面上形成存储栅极电极层的步骤，在表面上形成蚀刻速率慢于存储栅电极层的蚀刻速率的辅助膜的步骤 的存储栅电极层和对存储栅电极层和辅助膜进行各向异性蚀刻的步骤。

公开(公告)号：US20110014783A1

公开(公告)日：2011-01-20

申请号：US12888995

申请日：2010-09-23

申请人： Tsutomu OKAZAKI ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

发明人： Tsutomu OKAZAKI ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

IPC分类号： H01L21/283

CPC分类号： H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792

摘要： A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.

摘要翻译： 半导体器件的制造方法包括：第一电极形成步骤，在控制栅电极和半导体衬底之间形成控制栅极电极，该控制栅电极在半导体衬底的表面上方，控制栅绝缘膜，形成存储节点 绝缘膜，以及在存储节点绝缘膜的表面上形成存储栅电极的第二电极形成步骤。 第二电极形成步骤包括在存储节点绝缘膜的表面上形成存储栅极电极层的步骤，在表面上形成蚀刻速率慢于存储栅电极层的蚀刻速率的辅助膜的步骤 的存储栅电极层和对存储栅电极层和辅助膜进行各向异性蚀刻的步骤。

公开(公告)号：US20100159687A1

公开(公告)日：2010-06-24

申请号：US12719524

申请日：2010-03-08

申请人： Tsutomu OKAZAKI ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

发明人： Tsutomu OKAZAKI ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

IPC分类号： H01L21/28

CPC分类号： H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792

摘要： A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.

摘要翻译： 半导体器件的制造方法包括：第一电极形成步骤，在控制栅电极和半导体衬底之间形成控制栅极电极，该控制栅电极在半导体衬底的表面上方，控制栅绝缘膜，形成存储节点 绝缘膜，以及在存储节点绝缘膜的表面上形成存储栅电极的第二电极形成步骤。 第二电极形成步骤包括在存储节点绝缘膜的表面上形成存储栅极电极层的步骤，在表面上形成蚀刻速率慢于存储栅电极层的蚀刻速率的辅助膜的步骤 的存储栅电极层和对存储栅电极层和辅助膜进行各向异性蚀刻的步骤。

公开(公告)号：US20070155153A1

公开(公告)日：2007-07-05

申请号：US11649208

申请日：2007-01-04

申请人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

发明人： Tsutomu Okazaki ,  Motoi Ashida ,  Hiroji Ozaki ,  Tsuyoshi Koga ,  Daisuke Okada

IPC分类号： H01L21/44

CPC分类号： H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792

摘要： A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.

摘要翻译： 半导体器件的制造方法包括：第一电极形成步骤，在控制栅电极和半导体衬底之间形成控制栅极电极，该控制栅电极在半导体衬底的表面上方，控制栅绝缘膜，形成存储节点 绝缘膜，以及在存储节点绝缘膜的表面上形成存储栅电极的第二电极形成步骤。 第二电极形成步骤包括在存储节点绝缘膜的表面上形成存储栅极电极层的步骤，在表面上形成蚀刻速率慢于存储栅电极层的蚀刻速率的辅助膜的步骤 的存储栅电极层和对存储栅电极层和辅助膜进行各向异性蚀刻的步骤。

公开(公告)号：US06853022B2

公开(公告)日：2005-02-08

申请号：US10352987

申请日：2003-01-29

申请人： Tsuyoshi Koga ,  Yoshiyuki Ishigaki ,  Motoi Ashida ,  Yukio Maki ,  Yasuhiro Fujii ,  Tomohiro Hosokawa ,  Takashi Terada ,  Makoto Dei ,  Yasuichi Masuda

发明人： Tsuyoshi Koga ,  Yoshiyuki Ishigaki ,  Motoi Ashida ,  Yukio Maki ,  Yasuhiro Fujii ,  Tomohiro Hosokawa ,  Takashi Terada ,  Makoto Dei ,  Yasuichi Masuda

IPC分类号： H01L27/108 ,  G11C11/402 ,  G11C11/412 ,  H01L21/8242 ,  H01L21/8244 ,  H01L27/11

CPC分类号： G11C11/4023 ,  G11C11/412 ,  H01L27/108 ,  H01L27/10844 ,  H01L27/11 ,  H01L27/1108

摘要： A semiconductor memory device having as its main storage portion a capacitor storing charges as binary information and an access transistor controlling input/output of the charges to/from the capacitor, and eliminating the need for refresh, is obtained. The semiconductor memory device includes a capacitor with a storage node located above a semiconductor substrate and holding the charges corresponding to a logical level of stored binary information, an access transistor located on the semiconductor substrate surface and controlling input/output of the charges accumulated in the capacitor, and a latch circuit located on the semiconductor substrate and maintaining a potential of the capacitor storage node. At least one of circuit elements constituting the latch circuit is located above the access transistor.

摘要翻译： 一种半导体存储器件，其主要存储部分是存储电荷作为二进制信息的电容器，以及控制向电容器的电荷输入/输出的存取晶体管，并且不需要刷新。 半导体存储器件包括具有存储节点的电容器，该存储节点位于半导体衬底之上，并且保持对应于存储的二进制信息的逻辑电平的电荷，位于半导体衬底表面上的存取晶体管，并控制累积在该半导体衬底表面上的电荷的输入/输出 电容器和位于半导体衬底上的锁存电路，并保持电容器存储节点的电位。 构成锁存电路的电路元件中的至少一个位于存取晶体管的上方。

公开(公告)号：US20120122246A1

公开(公告)日：2012-05-17

申请号：US13353004

申请日：2012-01-18

申请人： Kazuyuki MISUMI ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

发明人： Kazuyuki MISUMI ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

IPC分类号： H01L21/8246

CPC分类号： H01L43/12 ,  H01L23/552 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L27/228 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

摘要翻译： 一种制造磁存储器芯片器件的方法包括以下步骤：在形成在硅晶片上的多个磁存储器芯片中的每一个中写入信息; 在写入信息之后，在硅晶片的背面上粘附高磁导率板，高磁导率板具有比硅更高的磁导率并且具有50μm以上的厚度; 在粘附高磁导率板之后，将硅晶片切割成各自的磁存储芯片。

公开(公告)号：US08124425B2

公开(公告)日：2012-02-28

申请号：US12525999

申请日：2008-02-21

申请人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

发明人： Kazuyuki Misumi ,  Masahiro Shimizu ,  Tsuyoshi Koga ,  Tatsuhiko Akiyama ,  Tomohiro Murakami

IPC分类号： H01L21/00

CPC分类号： H01L43/12 ,  H01L23/552 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L27/228 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 μm or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

摘要翻译： 一种制造磁存储器芯片器件的方法包括以下步骤：在形成在硅晶片上的多个磁存储器芯片中的每一个中写入信息; 在写入信息之后，在硅晶片的背面上粘附高磁导率板，高磁导率板具有比硅更高的磁导率并且具有50μm以上的厚度; 在粘附高磁导率板之后，将硅晶片切割成各自的磁存储芯片。