MAGNETIC STORAGE DEVICE
    1.
    发明公开

    公开(公告)号:US20240090344A1

    公开(公告)日:2024-03-14

    申请号:US18178469

    申请日:2023-03-03

    CPC classification number: H10N50/85 H10B61/00 H10N50/20 H01F10/329

    Abstract: A magnetic storage device includes first and second magnetic layers and a non-magnetic layer, where the non-magnetic layer includes a first oxide layer containing magnesium and oxygen, a second oxide layer containing magnesium and oxygen, a third oxide layer containing zinc and oxygen, a fourth oxide layer containing a first predetermined element and oxygen, and a fifth oxide layer containing a second predetermined element and oxygen, and a crystal structure of an oxide of the first predetermined element and a crystal structure of an oxide of the second predetermined element are each a rock salt structure. The first predetermined element and the second predetermined element each have an oxide formation free energy greater than an oxide formation free energy of zinc, and the oxide of the first predetermined element and the oxide of the second predetermined element each have a bandgap narrower than a bandgap of an oxide of magnesium.

    SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20210257413A1

    公开(公告)日:2021-08-19

    申请号:US17003759

    申请日:2020-08-26

    Inventor: Hiroyuki KANAYA

    Abstract: A semiconductor memory device has a first wiring extending in a first direction and a second wiring extending in a second direction. The first and second wirings are spaced from each other in a third direction. The second wiring has a first recess facing the first wiring. A resistance change memory element is connected between the first and second wirings. A conductive layer is between the resistance change memory element and the second wiring and includes a first protrusion facing the second wiring, A switching portion is between the conductive layer and the second wiring and includes a second recess facing the conductive layer and a second protrusion facing the second wiring. The first protrusion is in the second recess. The second protrusion is in the first recess. The switching portion is configured to switch conductivity state according to voltage between the first wiring and the second wiring.

    SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20240292631A1

    公开(公告)日:2024-08-29

    申请号:US18587939

    申请日:2024-02-26

    CPC classification number: H10B61/10

    Abstract: A semiconductor storage device includes a plurality of first wirings extending in a first direction and a plurality of second wirings extending in a second direction intersecting the first direction. A plurality of memory cells are connected between the plurality of first wirings and the plurality of second wirings and include selectors each connected in series to variable resistance elements. Each selector includes a selector material switching a current flowing to the variable resistance element according to a voltage difference between the first wiring and the second wiring, and first and second electrodes sandwiching the selector material in a portion between the first wiring and the variable resistance element. A contact area between the first electrode and the selector material is less than an area of the selector material when viewed in a stacking direction of the selector and the variable resistance element.

    STORAGE DEVICE AND METHOD OF MANUFACTURING A STORAGE DEVICE

    公开(公告)号:US20240324477A1

    公开(公告)日:2024-09-26

    申请号:US18593589

    申请日:2024-03-01

    CPC classification number: H10N70/841 H10B63/84 H10N70/011 H10N70/8828

    Abstract: A storage device includes a memory cell that includes a variable resistance storage element and a switching element connected in series thereto and stacked therewith in a first direction, the switching element including a first electrode, a second electrode that includes a first part formed of a first material to which a first element is added, and a switching material layer that is between the first electrode and the first part of the second electrode and formed of a first insulating material to which the first element is added. The storage device further includes a first insulating layer that surrounds the switching material layer and formed of the first insulating material to which the first element is not added. An outer periphery of the first part of the second electrode and an outer periphery of the switching material layer are aligned in the first direction.

    MEMORY DEVICE
    8.
    发明申请

    公开(公告)号:US20230079445A1

    公开(公告)日:2023-03-16

    申请号:US17692625

    申请日:2022-03-11

    Abstract: According to one embodiment, a memory device includes a first memory cell, a second memory cell adjacent to the first memory cell in a first direction, and a third memory cell adjacent to the first memory cell in a second direction, each of the first, second, and third memory cells including a resistance change memory element and a switching element. The switching element includes first and second electrodes, and a switching material layer between the first and second electrodes, the first and second electrodes overlap each other when viewed from the first direction, the first electrodes in the first and second memory cells are apart from each other, and the switching material layers in the first and second memory cells are continuously provided.

    MAGNETIC MEMORY DEVICE
    9.
    发明申请

    公开(公告)号:US20220085281A1

    公开(公告)日:2022-03-17

    申请号:US17196772

    申请日:2021-03-09

    Inventor: Hiroyuki KANAYA

    Abstract: According to one embodiment, a magnetic memory device includes first and second wirings, and memory cells between the first and second wirings, and each including a switching element and a magnetoresistance effect element, the switching element being connected to a first wiring, and the magnetoresistance effect element being connected to a second wiring. The switching element includes a bottom electrode, a top electrode, and a switching material layer between the bottom and top electrodes, and the bottom electrode included in each of the memory cells adjacent to each other in a first direction is continuously provided on the first wiring connecting the memory cells adjacent to each ether in the first direction.

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