公开(公告)号：US08487316B2

公开(公告)日：2013-07-16

申请号：US12914930

申请日：2010-10-28

申请人： Kai Cheng ,  Stefan Degroote

发明人： Kai Cheng ,  Stefan Degroote

IPC分类号： H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L27/0605 ,  H01L21/8252 ,  H01L21/8258

摘要： An integrated semiconductor substrate structure is disclosed. In one aspect, the structure includes a substrate, a GaN-heterostructure and a semiconductor substrate layer. The GaN heterostructure is present in a first device area for definition of GaN-based devices, and is covered at least partially with a protection layer. The semiconductor substrate layer is present in a second device area for definition of CMOS devices. At least one of the GaN heterostructure and the semiconductor substrate layer is provided in at least one trench in the substrate, so that the GaN heterostructure and the semiconductor substrate layer are laterally juxtaposed.

摘要翻译： 公开了一种集成半导体衬底结构。 一方面，该结构包括衬底，GaN异质结构和半导体衬底层。 GaN异质结构存在于用于GaN基器件的定义的第一器件区域中，并且至少部分地被保护层覆盖。 半导体衬底层存在于用于CMOS器件定义的第二器件区域中。 至少GaN基异质结构和半导体衬底层中的至少一个设置在衬底中的至少一个沟槽中，使得GaN异质结构和半导体衬底层横向并置。

公开(公告)号：US20110108850A1

公开(公告)日：2011-05-12

申请号：US12914930

申请日：2010-10-28

申请人： Kai CHENG ,  Stefan Degroote

发明人： Kai CHENG ,  Stefan Degroote

IPC分类号： H01L27/085 ,  H01L21/8232

CPC分类号： H01L27/0605 ,  H01L21/8252 ,  H01L21/8258

摘要： An integrated semiconductor substrate structure is disclosed. In one aspect, the structure includes a substrate, a GaN-heterostructure and a semiconductor substrate layer. The GaN heterostructure is present in a first device area for definition of GaN-based devices, and is covered at least partially with a protection layer. The semiconductor substrate layer is present in a second device area for definition of CMOS devices. At least one of the GaN heterostructure and the semiconductor substrate layer is provided in at least one trench in the substrate, so that the GaN heterostructure and the semiconductor substrate layer are laterally juxtaposed.

摘要翻译： 公开了一种集成半导体衬底结构。 一方面，该结构包括衬底，GaN异质结构和半导体衬底层。 GaN异质结构存在于用于GaN基器件的定义的第一器件区域中，并且至少部分地被保护层覆盖。 半导体衬底层存在于用于CMOS器件定义的第二器件区域中。 至少GaN基异质结构和半导体衬底层中的至少一个设置在衬底中的至少一个沟槽中，使得GaN异质结构和半导体衬底层横向并置。

公开(公告)号：US20110101370A1

公开(公告)日：2011-05-05

申请号：US12916346

申请日：2010-10-29

申请人： Kai Cheng ,  Stefan Degroote

发明人： Kai Cheng ,  Stefan Degroote

IPC分类号： H01L29/66 ,  H01L21/20

CPC分类号： H01L21/02389 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/66477 ,  H01L29/7786

摘要： A semiconductor device and method of manufacturing the device is disclosed. In one aspect, the device includes a semiconductor substrate and a GaN-type layer stack on top of the semiconductor substrate. The GaN-type layer stack has at least one buffer layer, a first active layer and a second active layer. Active device regions are definable at an interface of the first and second active layer. The semiconductor substrate is present on an insulating layer and is patterned to define trenches according to a predefined pattern, which includes at least one trench underlying the active device region. The trenches extend from the insulating layer into at least one buffer layer of the GaN-type layer stack and are overgrown within the at least one buffer layer, so as to obtain that the first and the second active layer are continuous at least within the active device regions.

摘要翻译： 公开了一种半导体器件及其制造方法。 一方面，该器件在半导体衬底的顶部上包​​括半导体衬底和GaN型层叠层。 GaN型层堆叠具有至少一个缓冲层，第一有源层和第二有源层。 有源器件区可以在第一和第二有源层的界面处被定义。 半导体衬底存在于绝缘层上，并被图案化以根据预定图案限定沟槽，其包括位于有源器件区域下方的至少一个沟槽。 沟槽从绝缘层延伸到GaN型层堆叠的至少一个缓冲层中，并且在至少一个缓冲层内长满，从而获得第一和第二活性层至少在活性物质内连续 设备区域。

公开(公告)号：US07666765B2

公开(公告)日：2010-02-23

申请号：US11690509

申请日：2007-03-23

申请人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

发明人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

IPC分类号： H01L21/20 ,  H01L23/58

CPC分类号： C30B29/403 ,  C23C16/0272 ,  C23C16/303 ,  C23C16/325 ,  C23C16/45523 ,  C30B25/02 ,  C30B25/18 ,  C30B29/36 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02529 ,  H01L21/0254 ,  H01L21/0262

摘要： Semiconductor process technology and devices are provided, including a method for forming a high quality group III nitride layer on a silicon substrate and to a device obtainable therefrom. According to the method, a pre-dosing step is applied to a silicon substrate, wherein the substrate is exposed to at least 0.01 μmol/cm2 of one or more organometallic compounds containing Al, in a flow of less than 5 μmol/min. The preferred embodiments are equally related to the semiconductor structure obtained by the method, and to a device comprising said structure.

摘要翻译： 提供半导体工艺技术和器件，包括在硅衬底上形成高质量III族氮化物层的方法以及由其获得的器件。 根据该方法，将预处理步骤应用于硅衬底，其中衬底以小于5μmol/ min的流量暴露于含有Al的至少0.01μmol/ cm 2的一种或多种有机金属化合物。 优选实施例与通过该方法获得的半导体结构和包括所述结构的装置相同。

公开(公告)号：US20070238315A1

公开(公告)日：2007-10-11

申请号：US11690509

申请日：2007-03-23

申请人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

发明人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： C30B29/403 ,  C23C16/0272 ,  C23C16/303 ,  C23C16/325 ,  C23C16/45523 ,  C30B25/02 ,  C30B25/18 ,  C30B29/36 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02529 ,  H01L21/0254 ,  H01L21/0262

摘要： Semiconductor process technology and devices are provided, including a method for forming a high quality group III nitride layer on a silicon substrate and to a device obtainable therefrom. According to the method, a pre-dosing step is applied to a silicon substrate, wherein the substrate is exposed to at least 0.01 μmol/cm2 of one or more organometallic compounds containing Al, in a flow of less than 5 μmol/min. The preferred embodiments are equally related to the semiconductor structure obtained by the method, and to a device comprising said structure.

摘要翻译： 提供半导体工艺技术和器件，包括在硅衬底上形成高质量III族氮化物层的方法以及由其获得的器件。 根据该方法，将预处理步骤应用于硅衬底，其中衬底暴露于含有Al的一种或多种有机金属化合物的至少0.01μmol/ cm 2以下的流动 小于5玛瑙/分钟。 优选实施例与通过该方法获得的半导体结构和包括所述结构的装置相同。

公开(公告)号：US08373204B2

公开(公告)日：2013-02-12

申请号：US12916346

申请日：2010-10-29

申请人： Kai Cheng ,  Stefan Degroote

发明人： Kai Cheng ,  Stefan Degroote

IPC分类号： H01L27/148

CPC分类号： H01L21/02389 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/66477 ,  H01L29/7786

摘要： A semiconductor device and method of manufacturing the device is disclosed. In one aspect, the device includes a semiconductor substrate and a GaN-type layer stack on top of the semiconductor substrate. The GaN-type layer stack has at least one buffer layer, a first active layer and a second active layer. Active device regions are definable at an interface of the first and second active layer. The semiconductor substrate is present on an insulating layer and is patterned to define trenches according to a predefined pattern, which includes at least one trench underlying the active device region. The trenches extend from the insulating layer into at least one buffer layer of the GaN-type layer stack and are overgrown within the at least one buffer layer, so as to obtain that the first and the second active layer are continuous at least within the active device regions.

摘要翻译： 公开了一种半导体器件及其制造方法。 一方面，该器件在半导体衬底的顶部上包​​括半导体衬底和GaN型层叠层。 GaN型层堆叠具有至少一个缓冲层，第一有源层和第二有源层。 有源器件区可以在第一和第二有源层的界面处被定义。 半导体衬底存在于绝缘层上，并被图案化以根据预定图案限定沟槽，其包括位于有源器件区域下方的至少一个沟槽。 沟槽从绝缘层延伸到GaN型层堆叠的至少一个缓冲层中，并且在至少一个缓冲层内长满，以便获得第一和第二活性层至少在活性物质内连续 设备区域。

公开(公告)号：US07989925B2

公开(公告)日：2011-08-02

申请号：US12502940

申请日：2009-07-14

申请人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

发明人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

IPC分类号： H01L21/20 ,  H01L23/58

CPC分类号： C30B29/403 ,  C23C16/0272 ,  C23C16/303 ,  C23C16/325 ,  C23C16/45523 ,  C30B25/02 ,  C30B25/18 ,  C30B29/36 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02529 ,  H01L21/0254 ,  H01L21/0262

摘要： Semiconductor process technology and devices are provided, including a method for forming a high quality group III nitride layer on a silicon substrate and to a device obtainable therefrom. According to the method, a pre-dosing step is applied to a silicon substrate, wherein the substrate is exposed to at least 0.01 μmol/cm2 of one or more organometallic compounds containing Al, in a flow of less than 5 μmol/min. The preferred embodiments are equally related to the semiconductor structure obtained by the method, and to a device comprising said structure.

摘要翻译： 提供半导体工艺技术和器件，包括在硅衬底上形成高质量III族氮化物层的方法以及由其获得的器件。 根据该方法，将预处理步骤应用于硅衬底，其中衬底以小于5μmol/ min的流量暴露于含有Al的至少0.01μmol/ cm 2的一种或多种有机金属化合物。 优选实施例与通过该方法获得的半导体结构和包括所述结构的装置相同。

公开(公告)号：US20090294777A1

公开(公告)日：2009-12-03

申请号：US12502940

申请日：2009-07-14

申请人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

发明人： Kai Cheng ,  Maarten Leys ,  Stefan Degroote

IPC分类号： H01L29/12 ,  H01L29/20

CPC分类号： C30B29/403 ,  C23C16/0272 ,  C23C16/303 ,  C23C16/325 ,  C23C16/45523 ,  C30B25/02 ,  C30B25/18 ,  C30B29/36 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02529 ,  H01L21/0254 ,  H01L21/0262

摘要： Semiconductor process technology and devices are provided, including a method for forming a high quality group III nitride layer on a silicon substrate and to a device obtainable therefrom. According to the method, a pre-dosing step is applied to a silicon substrate, wherein the substrate is exposed to at least 0.01 μmol/cm2 of one or more organometallic compounds containing Al, in a flow of less than 5 μmol/min. The preferred embodiments are equally related to the semiconductor structure obtained by the method, and to a device comprising said structure.

摘要翻译： 提供半导体工艺技术和器件，包括在硅衬底上形成高质量III族氮化物层的方法以及由其获得的器件。 根据该方法，将预处理步骤应用于硅衬底，其中衬底以小于5mumol / min的流量暴露于至少0.01mumol / cm 2的含有Al的一种或多种有机金属化合物。 优选实施例与通过该方法获得的半导体结构和包括所述结构的装置相同。

公开(公告)号：US07964482B2

公开(公告)日：2011-06-21

申请号：US12309939

申请日：2007-07-09

申请人： Ruben Lieten ,  Stefan Degroote

发明人： Ruben Lieten ,  Stefan Degroote

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： C30B23/025 ,  C30B23/02 ,  C30B29/403 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02521 ,  H01L21/02614

摘要： The present invention provides a method for depositing or growing a group III-nitride layer, e.g. GaN layer (5), on a substrate (1), the substrate (1) comprising at least a Ge surface (3), preferably with hexagonal symmetry. The method comprises heating the substrate (1) to a nitridation temperature between 400° C. and 940° C. while exposing the substrate (1) to a nitrogen gas flow and subsequently depositing the group III-nitride layer, e.g. GaN layer (5), onto the Ge surface (3) at a deposition temperature between 100° C. and 940° C. By a method according to embodiments of the invention, a group III-nitride layer, e.g. GaN layer (5), with good crystal quality may be obtained. The present invention furthermore provides a group III-nitride/substrate structure formed by the method according to embodiments of the present invention and a semiconductor device comprising at least one such structure.

摘要翻译： 本发明提供了一种用于沉积或生长III族氮化物层的方法， GaN衬底（1）上的GaN层（5），至少包括Ge表面（3）的衬底（1），优选具有六边形对称性。 该方法包括将衬底（1）加热到400℃至940℃的氮化温度，同时将衬底（1）暴露于氮气流并随后沉积III族氮化物层，例如， GaN层（5）以100℃至940℃之间的沉积温度在Ge表面（3）上沉积。通过根据本发明实施方案的方法，可以使用III族氮化物层。 可以获得具有良好晶体质量的GaN层（5）。 本发明还提供了通过根据本发明的实施方案的方法形成的III族氮化物/衬底结构和包括至少一种这样的结构的半导体器件。

公开(公告)号：US20090189192A1

公开(公告)日：2009-07-30

申请号：US12309939

申请日：2007-07-09

申请人： Ruben Lieten ,  Stefan Degroote

发明人： Ruben Lieten ,  Stefan Degroote

IPC分类号： H01L29/267 ,  H01L21/203

CPC分类号： C30B23/025 ,  C30B23/02 ,  C30B29/403 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02521 ,  H01L21/02614

摘要： The present invention provides a method for depositing or growing a group III-nitride layer, e.g. GaN layer (5), on a substrate (1), the substrate (1) comprising at least a Ge surface (3), preferably with hexagonal symmetry. The method comprises heating the substrate (1) to a nitridation temperature between 400° C. and 940° C. while exposing the substrate (1) to a nitrogen gas flow and subsequently depositing the group III-nitride layer, e.g. GaN layer (5), onto the Ge surface (3) at a deposition temperature between 100° C. and 940° C. By a method according to embodiments of the invention, a group III-nitride layer, e.g. GaN layer (5), with good crystal quality may be obtained. The present invention furthermore provides a group III-nitride/substrate structure formed by the method according to embodiments of the present invention and a semiconductor device comprising at least one such structure.

摘要翻译： 本发明提供了一种用于沉积或生长III族氮化物层的方法， GaN衬底（1）上的GaN层（5），至少包括Ge表面（3）的衬底（1），优选具有六边形对称性。 该方法包括将衬底（1）加热到400℃至940℃的氮化温度，同时将衬底（1）暴露于氮气流并随后沉积III族氮化物层，例如， GaN层（5）以100℃至940℃之间的沉积温度在Ge表面（3）上沉积。通过根据本发明实施方案的方法，可以使用III族氮化物层。 可以获得具有良好晶体质量的GaN层（5）。 本发明还提供了通过根据本发明的实施方案的方法形成的III族氮化物/衬底结构和包括至少一种这样的结构的半导体器件。