-
公开(公告)号：US20190042319A1
公开(公告)日：2019-02-07
申请号：US16147118
申请日：2018-09-28
摘要： System and techniques for multifactor intelligent agent control are described herein. A workload request may be received from a user device via a network. The workload may be instantiated in an isolated environment on an edge computing platform. Here, the isolated environment may be a container or a virtual machine. The instantiation of the workload may include using a hardware security component (SEC) of the mobile edge computing platform to prevent access to data or code of the workload from other environments hosted by the mobile edge computing platform. The workload may then be executed in the isolated environment and a result of the workload returned to the user device.
-
公开(公告)号：US20170094377A1
公开(公告)日：2017-03-30
申请号：US14866567
申请日：2015-09-25
申请人： Andrew J. Herdrich , Patrick L. Connor , Dinesh Kumar , Alexander W. Min , Daniel J. Dahle , Kapil Sood , Jeffrey A. Shaw , Edwin Verplanke , Scott P. Dubal , James R. Hearn
发明人： Andrew J. Herdrich , Patrick L. Connor , Dinesh Kumar , Alexander W. Min , Daniel J. Dahle , Kapil Sood , Jeffrey A. Shaw , Edwin Verplanke , Scott P. Dubal , James R. Hearn
CPC分类号： H04Q9/02 , H04L41/5009 , H04L41/5019 , H04L43/08 , H04L43/10
摘要： Devices and techniques for out-of-band platform tuning and configuration are described herein. A device can include a telemetry interface to a telemetry collection system and a network interface to network adapter hardware. The device can receive platform telemetry metrics from the telemetry collection system, and network adapter silicon hardware statistics over the network interface, to gather collected statistics. The device can apply a heuristic algorithm using the collected statistics to determine processing core workloads generated by operation of a plurality of software systems communicatively coupled to the device. The device can provide a reconfiguration message to instruct at least one software system to switch operations to a different processing core, responsive to detecting an overload state on at least one processing core, based on the processing core workloads. Other embodiments are also described.
-
公开(公告)号：US20170289068A1
公开(公告)日：2017-10-05
申请号：US15088910
申请日：2016-04-01
申请人： Stephen T. Palermo , Iosif Gasparakis , Scott P. Dubal , Kapil Sood , Trevor Cooper , Jr-Shian Tsai , Jesse C. Brandeburg , Andrew J. Herdrich , Edwin Verplanke
发明人： Stephen T. Palermo , Iosif Gasparakis , Scott P. Dubal , Kapil Sood , Trevor Cooper , Jr-Shian Tsai , Jesse C. Brandeburg , Andrew J. Herdrich , Edwin Verplanke
IPC分类号： H04L12/861 , H04L12/931 , G06F15/173 , H04L12/715
CPC分类号： H04L49/9047 , G06F9/45558 , G06F15/17331 , G06F2009/45595 , H04L45/64 , H04L49/70
摘要： Methods and apparatus for accelerating VM-to-VM Network Traffic using CPU cache. A virtual queue manager (VQM) manages data that is to be kept in VM-VM shared data buffers in CPU cache. The VQM stores a list of VM-VM allow entries identifying data transfers between VMs that may use VM-VM cache “fast-path” forwarding. Packets are sent from VMs to the VQM for forwarding to destination VMs. Indicia in the packets (e.g., in a tag or header) is inspected to determine whether a packet is to be forwarded via a VM-VM cache fast path or be forwarded via a virtual switch. The VQM determines the VM data already in the CPU cache domain while concurrently coordinating with the data to and from the external shared memory, and also ensures data coherency between data kept in cache and that which is kept in shared memory.
-
公开(公告)号：US09769050B2
公开(公告)日：2017-09-19
申请号：US14581595
申请日：2014-12-23
申请人： Andrew J. Herdrich , Patrick Connor , Dinesh Kumar , Alexander W. Min , Ravishankar Iyer , Daniel J. Dahle , Kapil Sood , Jeffrey B. Shaw
发明人： Andrew J. Herdrich , Patrick Connor , Dinesh Kumar , Alexander W. Min , Ravishankar Iyer , Daniel J. Dahle , Kapil Sood , Jeffrey B. Shaw
IPC分类号： G06F15/173 , H04L12/26 , H04L12/24 , G06F12/084 , G06F12/0811
CPC分类号： H04L43/50 , G06F12/0811 , G06F12/084 , G06F2212/152 , G06F2212/601 , H04L41/0896 , H04L41/5009 , H04L41/5025 , H04L41/5035 , H04L41/5096 , H04L43/16
摘要： In embodiments, apparatuses, methods and storage media (transitory and non-transitory) are described that are associated with end-to-end datacenter performance control. In various embodiments, an apparatus for computing may receive a datacenter performance target, determine an end-to-end datacenter performance level based at least in part on quality of service data collected from a plurality of nodes, and send a mitigation command based at least in part on a result of a comparison of the end-to-end datacenter performance level determined to the datacenter performance target. In various embodiments, the apparatus for computing may include one or more processors, a memory, a datacenter performance monitor to receive a datacenter performance target corresponding to a service level agreement, and a mitigation module to send a mitigation command based at least in part on a result of a comparison of an end-to-end datacenter performance level to a datacenter performance target.
-
公开(公告)号：US20160182345A1
公开(公告)日：2016-06-23
申请号：US14581595
申请日：2014-12-23
申请人： Andrew J. Herdrich , Patrick Connor , Dinesh Kumar , Alexander W. Min , Ravishankar Iyer , Daniel J. Dahle , Kapil Sood , Jeffrey B. Shaw
发明人： Andrew J. Herdrich , Patrick Connor , Dinesh Kumar , Alexander W. Min , Ravishankar Iyer , Daniel J. Dahle , Kapil Sood , Jeffrey B. Shaw
IPC分类号： H04L12/26
CPC分类号： H04L43/50 , G06F12/0811 , G06F12/084 , G06F2212/152 , G06F2212/601 , H04L41/0896 , H04L41/5009 , H04L41/5025 , H04L41/5035 , H04L41/5096 , H04L43/16
摘要： In embodiments, apparatuses, methods and storage media (transitory and non-transitory) are described that are associated with end-to-end datacenter performance control. In various embodiments, an apparatus for computing may receive a datacenter performance target, determine an end-to-end datacenter performance level based at least in part on quality of service data collected from a plurality of nodes, and send a mitigation command based at least in part on a result of a comparison of the end-to-end datacenter performance level determined to the datacenter performance target. In various embodiments, the apparatus for computing may include one or more processors, a memory, a datacenter performance monitor to receive a datacenter performance target corresponding to a service level agreement, and a mitigation module to send a mitigation command based at least in part on a result of a comparison of an end-to-end datacenter performance level to a datacenter performance target.
摘要翻译： 在实施例中，描述了与端对端数据中心性能控制相关联的装置，方法和存储介质（暂时性和非暂时性）。 在各种实施例中，用于计算的装置可以接收数据中心性能目标，至少部分地基于从多个节点收集的服务质量数据来确定端对端数据中心性能级别，并且至少基于从多个节点收集的服务数据发送缓解命令 部分原因是比较确定数据中心性能目标的端对端数据中心性能级别。 在各种实施例中，用于计算的装置可以包括一个或多个处理器，存储器，用于接收与服务水平协议相对应的数据中心性能目标的数据中心性能监视器，以及缓解模块，用于至少部分地基于 这是将端到端数据中心性能级别与数据中心性能目标进行比较的结果。
-
6.发明申请公开(公告)号：US20180095880A1
公开(公告)日：2018-04-05
申请号：US15282483
申请日：2016-09-30
IPC分类号： G06F12/0811 , G06F9/30
CPC分类号： G06F12/0811 , G06F9/3004 , G06F12/128 , G06F2212/283 , Y02D10/13
摘要： Processors and methods implementing a machine instruction to perform cache line demotion on multiple cache lines to enable efficient sharing of cache lines between processor cores. One general aspect includes a processor comprising: a plurality of hardware processor cores, where each of the hardware processor cores to include a first cache. The processor also includes a second cache, communicatively coupled to and shared by the plurality of hardware processor cores. The processor to support a first machine instruction, the first machine instruction to include a vector register operand identifying a vector register which contains a plurality of data elements each used to identify a cache line. An execution of the first machine instruction by one of the plurality of hardware processor cores to cause a plurality of identified cache lines to be demoted, such that the demoted cache lines are moved from the first cache to the second cache.
-
7.发明申请METHOD FOR BOOTING A HETEROGENEOUS SYSTEM AND PRESENTING A SYMMETRIC CORE VIEW 有权用于打造异质系统并提供对称核心视图的方法公开(公告)号：US20140281457A1
公开(公告)日：2014-09-18
申请号：US13854001
申请日：2013-03-29
申请人： Elierzer Weissmann , Rinat Rappoport , Michael Mishaeli , Hisham Shafi , Oron Lenz , Jason W. Brandt , Stephen A. Fischer , Bret L. Toll , Inder M. Sodhi , Alon Naveh , Ganapati N. Srinivasa , Ashish V. Choubal , Scott D. Hahn , David A. Koufaty , Russel J. Fenger , Gaurav Khanna , Eugene Gorbatov , Mishali Naik , Andrew J. Herdrich , Abirami Prabhakaran , Sanjeev S. Sahagirdar , Paul Brett , Paolo Narvaez , Andrew D. Henroid , Dheeraj R. Subbareddy
发明人： Elierzer Weissmann , Rinat Rappoport , Michael Mishaeli , Hisham Shafi , Oron Lenz , Jason W. Brandt , Stephen A. Fischer , Bret L. Toll , Inder M. Sodhi , Alon Naveh , Ganapati N. Srinivasa , Ashish V. Choubal , Scott D. Hahn , David A. Koufaty , Russel J. Fenger , Gaurav Khanna , Eugene Gorbatov , Mishali Naik , Andrew J. Herdrich , Abirami Prabhakaran , Sanjeev S. Sahagirdar , Paul Brett , Paolo Narvaez , Andrew D. Henroid , Dheeraj R. Subbareddy
IPC分类号： G06F9/44
CPC分类号： G06F9/4401 , G06F9/45558 , G06F9/5077 , G06F9/5094 , Y02D10/22 , Y02D10/36
摘要： A heterogeneous processor architecture and a method of booting a heterogeneous processor is described. A processor according to one embodiment comprises: a set of large physical processor cores; a set of small physical processor cores having relatively lower performance processing capabilities and relatively lower power usage relative to the large physical processor cores; and a package unit, to enable a bootstrap processor. The bootstrap processor initializes the homogeneous physical processor cores, while the heterogeneous processor presents the appearance of a homogeneous processor to a system firmware interface.
摘要翻译： 描述异构处理器架构和启动异构处理器的方法。 根据一个实施例的处理器包括：一组大的物理处理器核心; 一组具有相对较低性能处理能力的小物理处理器核和相对于大型物理处理器核的相对较低的功率使用; 以及一个包装单元，用于启用自举处理器。 引导处理器初始化同构物理处理器内核，而异构处理器将均匀处理器的外观呈现给系统固件界面。
-
公开(公告)号：US20140189704A1
公开(公告)日：2014-07-03
申请号：US13730539
申请日：2012-12-28
申请人： Paolo Narvaez , Ganapati N. Srinivasa , Eugene Gorbatov , Dheeraj R. Subbareddy , Mishali Naik , Alon Naveh , Abirami Prabhakaran , Eliezer Weissmann , David A. Koufaty , Paul Brett , Scott D. Hahn , Andrew J. Herdrich , Ravishankar Iyer , Nagabhushan Chitlur , Inder M. Sodhi , Gaurav Khanna , Russell J. Fenger
发明人： Paolo Narvaez , Ganapati N. Srinivasa , Eugene Gorbatov , Dheeraj R. Subbareddy , Mishali Naik , Alon Naveh , Abirami Prabhakaran , Eliezer Weissmann , David A. Koufaty , Paul Brett , Scott D. Hahn , Andrew J. Herdrich , Ravishankar Iyer , Nagabhushan Chitlur , Inder M. Sodhi , Gaurav Khanna , Russell J. Fenger
IPC分类号： G06F9/50
CPC分类号： G06F9/5044 , G06F9/45533 , G06F9/5077 , G06F9/5094 , G06F15/80 , Y02D10/22
摘要： A heterogeneous processor architecture is described. For example, a processor according to one embodiment of the invention comprises: a first set of one or more physical processor cores having first processing characteristics; a second set of one or more physical processor cores having second processing characteristics different from the first processing characteristics; virtual-to-physical (V-P) mapping logic to expose a plurality of virtual processors to software, the plurality of virtual processors to appear to the software as a plurality of homogeneous processor cores, the software to allocate threads to the virtual processors as if the virtual processors were homogeneous processor cores; wherein the V-P mapping logic is to map each virtual processor to a physical processor within the first set of physical processor cores or the second set of physical processor cores such that a thread allocated to a first virtual processor by software is executed by a physical processor mapped to the first virtual processor from the first set or the second set of physical processors.
摘要翻译： 描述异构处理器架构。 例如，根据本发明的一个实施例的处理器包括：具有第一处理特性的一个或多个物理处理器核心的第一组; 具有不同于所述第一处理特性的第二处理特性的第二组一个或多个物理处理器核; 虚拟到物理（VP）映射逻辑，以将多个虚拟处理器暴露给软件，所述多个虚拟处理器将软件呈现为多个同构的处理器核，所述软件将线程分配给虚拟处理器，如同 虚拟处理器是同类处理器核心; 其中所述VP映射逻辑将每个虚拟处理器映射到所述第一物理处理器核心集合或所述第二物理处理器核心组内的物理处理器，使得通过软件分配给第一虚拟处理器的线程由物理处理器映射执行 从第一组或第二组物理处理器到第一虚拟处理器。
-
公开(公告)号：US20140095691A1
公开(公告)日：2014-04-03
申请号：US13630545
申请日：2012-09-28
申请人： Mrittika Ganguli , Muthuvel M. I. , Ananth S. Narayan , Jaideep Moses , Andrew J. Herdrich , Rahul Khanna
发明人： Mrittika Ganguli , Muthuvel M. I. , Ananth S. Narayan , Jaideep Moses , Andrew J. Herdrich , Rahul Khanna
IPC分类号： H04L12/24
CPC分类号： H04L41/50 , H04L41/145 , H04L41/5009 , H04L41/5025
摘要： In accordance with some embodiments, a cloud service provider may operate a data center in a way that dynamically reallocates resources across nodes within the data center based on both utilization and service level agreements. In other words, the allocation of resources may be adjusted dynamically based on current conditions. The current conditions in the data center may be a function of the nature of all the current workloads. Instead of simply managing the workloads in a way to increase overall execution efficiency, the data center instead may manage the workload to achieve quality of service requirements for particular workloads according to service level agreements.
摘要翻译： 根据一些实施例，云服务提供商可以以基于利用率和服务水平协议来动态地重新分配数据中心内的节点之间的资源的方式来操作数据中心。 换句话说，资源分配可以根据当前条件动态调整。 数据中心当前的状况可能是所有当前工作负载的性质的函数。 而不是简单地以提高总体执行效率的方式管理工作负载，而是根据服务级别协议，数据中心可以管理工作负载以实现特定工作负载的服务质量要求。
-
公开(公告)号：US20190140933A1
公开(公告)日：2019-05-09
申请号：US16235354
申请日：2018-12-28
申请人： Francesc Guim Bernat , Andrew J. Herdrich , Karthik Kumar , Felipe Pastor Beneyto , Edwin Verplanke
发明人： Francesc Guim Bernat , Andrew J. Herdrich , Karthik Kumar , Felipe Pastor Beneyto , Edwin Verplanke
IPC分类号： H04L12/26 , H04L12/729 , H04L12/851 , H04W28/02 , H04L12/24
摘要： A device of a service coordinating entity includes communications circuitry to communicate with a plurality of access networks via a corresponding plurality of network function virtualization (NFV) instances, processing circuitry, and a memory device. The processing circuitry is to perform operations to monitor stored performance metrics for the plurality of NFV instances. Each of the NFV instances is instantiated by a corresponding scheduler of a plurality of schedulers on a virtualization infrastructure of the service coordinating entity. A plurality of stored threshold metrics is retrieved, indicating a desired level for each of the plurality of performance metrics. A threshold condition is detected for at least one of the performance metrics for an NFV instance of the plurality of NFV instances, based on the retrieved plurality of threshold metrics. A hardware resource used by the NFV instance to communicate with an access network is adjusted based on the detected threshold condition.
-
-
-
-
-
-
-
-
-
搜索结果
23 条记录 (耗时 0.032 秒)
