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    Pipeline processor including interrupt control system for accurately perform interrupt processing even applied to VLIW and delay branch instruction in delay slot
    1.
    发明授权
    Pipeline processor including interrupt control system for accurately perform interrupt processing even applied to VLIW and delay branch instruction in delay slot 失效
    管道处理器包括中断控制系统，用于准确执行中断处理，甚至应用于VLIW，并延迟延迟槽中的分支指令

    公开(公告)号：US5815696A

    公开(公告)日：1998-09-29

    申请号：US888789

    申请日：1997-07-07

    申请人： Kazuhiko Tanaka ,  Tohru Nojiri ,  Keiji Kojima ,  Kiyokazu Nishioka ,  Yoshiki Kurokawa

    发明人： Kazuhiko Tanaka ,  Tohru Nojiri ,  Keiji Kojima ,  Kiyokazu Nishioka ,  Yoshiki Kurokawa

    IPC分类号： G06F9/30 ,  G06F9/38 ,  G06F9/48

    CPC分类号： G06F9/327 ,  G06F9/30149 ,  G06F9/3804

    摘要： There is provided an instruction supply unit 20 for generating addresses for each instruction when an interrupt occurs, from an interrupted instruction until an instruction to be executed later by the number of instructions contained in a delay slot of the instruction an interrupt control unit 50 for storing each address thus generated, and an instruction executing unit 30 for successively reading out each of the stored addresses from the address of the interrupted address after the interrupt processing is completed. The instruction executing unit 30 executes a branch instruction to the address which is first read out. Thereafter, with respect to the addresses which are read out secondly and subsequently, if the address is the branch destination address of the branch instruction, the instruction executing unit 30 executes the branch instruction to the address, and if the address is not the branch destination address, it executes an NOP instruction. Accordingly, even when the instruction length is not fixed, the interrupt can be accurately processed.

    摘要翻译： 提供了一个指令提供单元20，用于当中断发生时，从中断指令到稍后执行的指令的指令生成指令的延迟时隙中的指令数量，用于存储每个指令的地址，中断控制单元50用于存储 每个地址如此生成，以及指令执行单元30，用于在完成中断处理之后，从中断地址的地址中连续地读出每个存储的地址。 指令执行单元30对首先被读出的地址执行分支指令。 此后，对于第二次读出的地址，随后，如果地址是分支指令的分支目的地地址，则指令执行单元30对该地址执行分支指令，如果地址不是分支目的地 地址，它执行一个NOP指令。 因此，即使指令长度不固定，也能够正确地进行中断处理。

    Information processor having high speed and safety resume system
    5.
    发明授权
    Information processor having high speed and safety resume system 失效
    具有高速和安全恢复系统的信息处理器

    公开(公告)号：US5485623A

    公开(公告)日：1996-01-16

    申请号：US205708

    申请日：1994-03-03

    申请人： Yoshiki Kurokawa ,  Kiyokazu Nishioka ,  Hideki Kamimaki ,  Yoshifumi Atarashi

    发明人： Yoshiki Kurokawa ,  Kiyokazu Nishioka ,  Hideki Kamimaki ,  Yoshifumi Atarashi

    IPC分类号： G06F1/32 ,  G06F1/26

    CPC分类号： G06F1/3287 ,  G06F1/3203 ,  Y02B60/1282

    摘要： An information processor operating with a battery writes data which exists in a register of a CPU at that time into a predetermined stack area for transfer of an RAM when a suspend command is received in the normal operation state of the processor and shifts to the suspended state that the power supply to the minimum circuit components including the RAM is maintained and the power supply to the other circuit components is stopped. When insufficient power of the battery is detected in the suspended state, the information processor is started temporarily so as to automatically transfer and store the data in the RAM into a storage device using a non-volatile memory device.

    摘要翻译： 当处理器的正常运行状态下接收到暂停命令时，利用电池操作的信息处理器将此时存在于CPU的寄存器中的数据写入到用于传送RAM的预定堆栈区域中的数据，并转移到暂停状态 维持包括RAM的最小电路部件的电源，并停止对其他电路部件的供电。 当在暂停状态下检测到电池电量不足时，临时启动信息处理器，以便使用非易失性存储装置将RAM中的数据自动传送和存储到存储装置中。

    Display device
    7.
    发明授权
    Display device 有权
    显示设备

    公开(公告)号：US08314761B2

    公开(公告)日：2012-11-20

    申请号：US13524099

    申请日：2012-06-15

    申请人： Naoki Takada ,  Yasuyuki Kudo ,  Yoshiki Kurokawa ,  Norio Mamba ,  Shinichi Komura

    发明人： Naoki Takada ,  Yasuyuki Kudo ,  Yoshiki Kurokawa ,  Norio Mamba ,  Shinichi Komura

    IPC分类号： G09G5/02 ,  G09G3/36 ,  G09G5/10 ,  G06F15/00

    CPC分类号： G09G3/3607 ,  G09G3/3406 ,  G09G2320/0261 ,  G09G2320/0276 ,  G09G2320/0646 ,  G09G2360/16

    摘要： A processing portion for conversion from RGB to RGBW includes a W generating circuit, a sub-pixel rendering circuit, a W intensity calculating portion which transmits a W intensity setting value to a W generating circuit, and a low power backlight control circuit which expands data on the basis of the RGBW pixels generated by the sub-pixel rendering portion and lowers the backlight in accordance with the amount by which the data is expanded. The inputted RGB data is used as the RGBW data with the W intensity calculated by the W intensity calculating portion. A backlight control signal is generated based on the amount of data expansion in the sub-pixel rendering portion. Deterioration (darkness) of image quality due to a reduction in the brightness of a single color as a result of the conversion from RGB pixels to RGBW pixels is prevented and a reduction in the power is achieved.

    摘要翻译： 用于从RGB转换为RGBW的处理部分包括W发生电路，子像素渲染电路，向W发生电路发送W强度设置值的W强度计算部分和扩展数据的低功率背光控制电路 基于由子像素渲染部分生成的RGBW像素，并且根据数据扩展的量来降低背光。 输入的RGB数据被用作由W强度计算部分计算出的W强度的RGBW数据。 基于子像素渲染部分中的数据扩展量产生背光控制信号。 防止了由于RGB像素向RGBW像素的转换而导致的单色亮度降低导致的图像质量恶化（暗度），并且能够实现功率的降低。

    Display drive circuit
    8.
    发明授权
    Display drive circuit 有权
    显示驱动电路

    公开(公告)号：US08154560B2

    公开(公告)日：2012-04-10

    申请号：US12468345

    申请日：2009-05-19

    申请人： Yoshiki Kurokawa ,  Yasuyuki Kudo ,  Hiroyuki Nitta ,  Kazuki Homma ,  Junya Takeda

    发明人： Yoshiki Kurokawa ,  Yasuyuki Kudo ,  Hiroyuki Nitta ,  Kazuki Homma ,  Junya Takeda

    IPC分类号： G09G5/00 ,  G09G5/02 ,  H04N1/46 ,  H04N1/60 ,  G06T1/00 ,  G06K9/00 ,  G06K9/40

    CPC分类号： G09G1/002 ,  G09G3/3655 ,  G09G5/04 ,  G09G5/06 ,  G09G2320/0242 ,  G09G2340/145

    摘要： A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.

    摘要翻译： 本发明的显示驱动电路具有：能够存储初始色域顶点坐标的初始色域 - 顶点坐标存储单元; 能够存储用户目标色域顶点坐标的用户对象色彩 - 顶点坐标存储单元; 饱和扩张系数决定单元，用于基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数; 以及用于基于饱和度膨胀系数扩大显示数据的饱和度的扩展单元。 基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数，根据扩展系数扩展显示数据的饱和度。 因此，可以对于每个色域或LC显示面板的R，G和B颜色属性中的每一个来控制饱和度的扩大程度。

    DISPLAY APPARATUS AND DRIVIING DEVICE FOR DISPLAYING
    9.
    发明申请
    DISPLAY APPARATUS AND DRIVIING DEVICE FOR DISPLAYING 审中-公开
    用于显示的显示装置和驱动装置

    公开(公告)号：US20110242120A1

    公开(公告)日：2011-10-06

    申请号：US12750773

    申请日：2010-03-31

    申请人： Akihito AKAI ,  Yoshiki Kurokawa ,  Goki Toshima

    发明人： Akihito AKAI ,  Yoshiki Kurokawa ,  Goki Toshima

    IPC分类号： G06F13/00

    CPC分类号： G09G3/3406 ,  G09G2320/0646 ,  G09G2360/16

    摘要： The display unit can reduce the electric power consumed by the process of calculating an adjustment coefficient for display data, as typified by gradient control, and it can be readily adapted even to a display panel with a higher resolution. The display unit includes: a plurality of driving units arrayed in parallel and each operable to output a drive signal to a display panel; a plurality of first calculation units, and a plurality of display RAMs, each paired with one first calculation unit, the pairs of the first calculation units and display RAMs laid out along a direction of the parallel array of the driving units; and a second calculation unit which distributes display data supplied from outside to the display RAMs, receives display data from the display RAMs in parallel to analyze a histogram of tone distribution of pixel data corresponding to one screen, and calculates the adjustment coefficient based on a result of the analysis. In the display unit, the adjustment coefficient thus calculated is sent back to the first calculation units. The first calculation unit performs a calculation using display data read from the corresponding display RAM and the adjustment coefficient thereby to create drive data for the display panel.

    摘要翻译： 显示单元可以通过梯度控制代表的计算显示数据的调整系数的处理来减少消耗的电力，并且可以容易地适应于具有更高分辨率的显示面板。 显示单元包括：并行排列的多个驱动单元，每个驱动单元可操作以将驱动信号输出到显示面板; 多个第一计算单元和多个显示RAM，每个显示RAM与一个第一计算单元配对，沿着驱动单元的并行阵列的方向布置的第一计算单元和显示RAM对; 以及第二计算单元，其将从外部提供的显示数据分配到显示RAM，并行地从显示RAM接收显示数据，以分析与一个屏幕相对应的像素数据的色调分布的直方图，并且基于结果计算调整系数 的分析。 在显示单元中，将如此计算的调整系数发送回第一计算单元。 第一计算单元使用从对应的显示RAM读取的显示数据和调整系数进行计算，从而创建显示面板的驱动数据。

    DISPLAY DRIVING CIRCUIT
    10.
    发明申请
    DISPLAY DRIVING CIRCUIT 有权
    显示驱动电路

    公开(公告)号：US20110206290A1

    公开(公告)日：2011-08-25

    申请号：US13033659

    申请日：2011-02-24

    申请人： Yukari Katayama ,  Akihito Akai ,  Yoshiki Kurokawa ,  Yusuke Uchida

    发明人： Yukari Katayama ,  Akihito Akai ,  Yoshiki Kurokawa ,  Yusuke Uchida

    IPC分类号： G06K9/36

    CPC分类号： G09G3/3648 ,  G09G2320/0252 ,  G09G2320/0261 ,  G09G2320/0686 ,  G09G2320/103 ,  G09G2340/02 ,  G09G2340/16 ,  H04N19/124 ,  H04N19/146 ,  H04N19/172 ,  H04N19/42 ,  H04N19/60

    摘要： The display driving circuit includes: an OD (OverDrive) calculation circuit operable to generate an OD driving signal for improving the response characteristic of a display device according to display image data; a drive-output circuit operable to supply an OD driving signal to the display device; and a compression circuit operable to store compressed display data in a memory. The compression circuit includes a DCT calculation module operable to execute DCT (Discrete Cosine Transform) of display image data, and an entropy coding module operable to execute variable length entropy coding of DCT conversion display data. Preferably, the display driving circuit further includes a decompression circuit operable to supply an OD calculation circuit with display data resulting from decompression of compressed display data read out the memory.

    摘要翻译： 显示驱动电路包括：OD（OverDrive）计算电路，用于根据显示图像数据产生用于改善显示装置的响应特性的OD驱动信号; 驱动输出电路，其可操作以向所述显示装置提供OD驱动信号; 以及可操作以将压缩显示数据存储在存储器中的压缩电路。 压缩电路包括可以执行显示图像数据的DCT（离散余弦变换）的DCT计算模块和可操作以执行DCT变换显示数据的可变长度熵编码的熵编码模块。 优选地，显示驱动电路还包括解压缩电路，其可操作以向OD计算电路提供由对存储器读出的压缩显示数据的解压缩而得到的显示数据。