公开(公告)号：US20120273780A1

公开(公告)日：2012-11-01

申请号：US13547377

申请日：2012-07-12

申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC分类号： H01L29/12

CPC分类号： H01L29/78618 ,  G02F1/133345 ,  G02F1/133528 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2201/123 ,  G09G3/3674 ,  G09G2310/0286 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/247 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

摘要： An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

摘要翻译： 一个实施例是包括反向交错（底栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 电极层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。

公开(公告)号：US20120256179A1

公开(公告)日：2012-10-11

申请号：US13528009

申请日：2012-06-20

申请人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

发明人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

摘要翻译： 提供具有良好的电特性和高可靠性的晶体管以及包括该晶体管的显示装置。 晶体管是使用用于沟道区的氧化物半导体形成的底栅晶体管。 使用通过热处理进行脱水或脱氢的氧化物半导体层作为活性层。 有源层包括微结晶的浅表部分的第一区域和其余部分的第二区域。 通过使用具有这种结构的氧化物半导体层，可以抑制归因于表层部分的水分进入或从表面部分的氧的消除导致的n型变化，以及寄生通道的产生。 此外，可以减小氧化物半导体层与源极和漏极之间的接触电阻。

公开(公告)号：US20120241735A1

公开(公告)日：2012-09-27

申请号：US13421038

申请日：2012-03-15

申请人： Tatsuya HONDA ,  Hiroshi KANEMURA ,  Kengo AKIMOTO ,  Suzunosuke HIRAISHI

发明人： Tatsuya HONDA ,  Hiroshi KANEMURA ,  Kengo AKIMOTO ,  Suzunosuke HIRAISHI

IPC分类号： H01L29/22

CPC分类号： H01L29/247 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

摘要： Provided is an oxide semiconductor film which has more stable electric characteristics and essentially consists of indium zinc oxide. In addition, provided is a highly reliable semiconductor device which has stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film essentially consisting of indium zinc oxide has a hexagonal crystal structure in which the a-b plane is substantially parallel to a surface of the oxide semiconductor film and a rhombohedral crystal structure in which the a-b plane is substantially parallel to the surface of the oxide semiconductor film.

摘要翻译： 提供了具有更稳定的电特性并且基本上由氧化铟锌组成的氧化物半导体膜。 此外，提供了通过使用氧化物半导体膜具有稳定的电特性的高度可靠的半导体器件。 基本上由氧化铟锌组成的氧化物半导体膜具有六边形晶体结构，其中ab平面基本上平行于氧化物半导体膜的表面，并且其中ab平面基本上平行于氧化物表面的菱方晶体结构 半导体膜。

公开(公告)号：US20120138922A1

公开(公告)日：2012-06-07

申请号：US13307398

申请日：2011-11-30

申请人： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

发明人： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

IPC分类号： H01L29/12

CPC分类号： H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

摘要： An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.

摘要翻译： 提供了具有更稳定的导电性的氧化物半导体膜。 此外，通过使用氧化物半导体膜提供具有稳定的电特性和高可靠性的半导体器件。 氧化物半导体膜包括结晶区域，并且结晶区域包括其中a-b平面基本上平行于膜的表面并且c轴基本上垂直于膜的表面的晶体; 氧化物半导体膜具有稳定的导电性，并且相对于可见光，紫外线等的照射而言更加电稳定。 通过使用这种用于晶体管的氧化物半导体膜，可以提供具有稳定电特性的高可靠性半导体器件。

公开(公告)号：US20110318916A1

公开(公告)日：2011-12-29

申请号：US13228486

申请日：2011-09-09

申请人： Kengo AKIMOTO ,  Masashi TSUBUKU

发明人： Kengo AKIMOTO ,  Masashi TSUBUKU

IPC分类号： H01L21/283

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/41733

摘要： An object is to suppress deterioration of element characteristics even when an oxide semiconductor is formed after a gate insulating layer, a source electrode layer, and a drain electrode layer are formed. A gate electrode layer is formed over a substrate. A gate insulating layer is formed over the gate electrode layer. A source electrode layer and a drain electrode layer are formed over the gate insulating layer. Surface treatment is performed on surfaces of the gate insulating layer, the source electrode layer, and the drain electrode layer which are formed over the substrate. After the surface treatment is performed, an oxide semiconductor layer is formed over the gate insulating layer, the source electrode layer, and the drain electrode layer.

摘要翻译： 即使在形成了栅极绝缘层，源极电极层和漏极电极层之后形成氧化物半导体，也是要抑制元件特性的劣化。 在基板上形成栅极电极层。 在栅电极层上形成栅极绝缘层。 源极电极层和漏电极层形成在栅绝缘层上。 在形成在基板上的栅极绝缘层，源极电极层和漏极电极层的表面上进行表面处理。 在进行表面处理之后，在栅极绝缘层，源极电极层和漏极电极层上形成氧化物半导体层。

公开(公告)号：US20110241132A1

公开(公告)日：2011-10-06

申请号：US13159449

申请日：2011-06-14

申请人： Kengo AKIMOTO

发明人： Kengo AKIMOTO

IPC分类号： H01L29/78

CPC分类号： H01L27/12 ,  H01L27/105 ,  H01L27/11293 ,  H01L27/1214 ,  H01L27/1266

摘要： The semiconductor device includes a thin film transistor; a first interlayer insulating film over the thin film transistor; a first electrode electrically connected to one of a source region and a drain region, over the first interlayer insulating film; a second electrode electrically connected to the other of the source region and the drain region; a second interlayer insulating film formed over the first interlayer insulating film, the first electrode, and the second electrode; a first wiring electrically connected to one of the first electrode and the second electrode, on the second interlayer insulating film; and a second wiring not electrically connected to the other of the first electrode and the second electrode, on the second interlayer insulating film; in which the second wiring is not electrically connected to the other of the first electrode and the second electrode by a separation region formed in the second interlayer insulating film.

摘要翻译： 半导体器件包括薄膜晶体管; 薄膜晶体管上的第一层间绝缘膜; 在所述第一层间绝缘膜上方电连接到源区和漏区之一的第一电极; 电源地连接到所述源极区域和所述漏极区域中的另一个的第二电极; 形成在第一层间绝缘膜，第一电极和第二电极上的第二层间绝缘膜; 在第二层间绝缘膜上电连接到第一电极和第二电极之一的第一布线; 以及在所述第二层间绝缘膜上不与所述第一电极和所述第二电极中的另一个电连接的第二布线; 其中第二布线不通过形成在第二层间绝缘膜中的分离区域而电连接到第一电极和第二电极中的另一个。

公开(公告)号：US20110204362A1

公开(公告)日：2011-08-25

申请号：US13026518

申请日：2011-02-14

申请人： Kengo AKIMOTO ,  Ryosuke WATANABE ,  Masashi TSUBUKU ,  Shunpei YAMAZAKI

发明人： Kengo AKIMOTO ,  Ryosuke WATANABE ,  Masashi TSUBUKU ,  Shunpei YAMAZAKI

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618

摘要： It is an object to provide a semiconductor device including an oxide semiconductor, in which miniaturization of a transistor is achieved and the concentration of an electric field is relieved. The width of a gate electrode is reduced and a space between a source electrode layer and a drain electrode layer is shortened. By adding a rare gas in a self-alignment manner with the use of a gate electrode as a mask, a low-resistance region in contact with a channel formation region can be provided in an oxide semiconductor layer. Accordingly, even when the width of the gate electrode, that is, the line width of a gate wiring is small, the low-resistance region can be provided with high positional accuracy, so that miniaturization of a transistor can be realized.

摘要翻译： 本发明的目的是提供一种包括氧化物半导体的半导体器件，其中实现了晶体管的小型化和电场的集中。 栅电极的宽度减小，源电极层和漏电极层之间的间隔缩短。 通过使用栅电极作为掩模以自对准的方式添加稀有气体，可以在氧化物半导体层中提供与沟道形成区域接触的低电阻区域。 因此，即使栅电极的宽度，即栅极配线的线宽小，也能够提供高电位区域的高位置精度，能够实现晶体管的小型化。

公开(公告)号：US20110140098A1

公开(公告)日：2011-06-16

申请号：US12960636

申请日：2010-12-06

申请人： Kengo AKIMOTO ,  Shunpei YAMAZAKI

发明人： Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/78606

摘要： It is an object to provide a low-cost oxide semiconductor material which is excellent in controllability of the carrier concentration and stability, and to provide a field effect transistor including the oxide semiconductor material. An oxide including indium, silicon, and zinc is used as the oxide semiconductor material. Here, the content of silicon in the oxide semiconductor film is greater than or equal to 4 mol % and less than or equal to 8 mol %. The field effect transistor including such an In—Si—Zn—O film can withstand heat treatment at a high temperature and is effective against −BT stress.

摘要翻译： 本发明的目的是提供一种低载体氧化物半导体材料，其具有优异的载流子浓度和稳定性的可控性，并且提供包括该氧化物半导体材料的场效应晶体管。 使用包含铟，硅和锌的氧化物作为氧化物半导体材料。 这里，氧化物半导体膜中的硅含量大于或等于4摩尔％且小于或等于8摩尔％。 包含这种In-Si-Zn-O膜的场效应晶体管可以承受高温下的热处理，对-BT应力有效。

公开(公告)号：US20110024740A1

公开(公告)日：2011-02-03

申请号：US12846572

申请日：2010-07-29

申请人： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Junichiro SAKATA

发明人： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Junichiro SAKATA

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L29/78696 ,  H01L27/1225 ,  H01L29/7869

摘要： A semiconductor device having a structure which enables sufficient reduction in parasitic capacitance is provided. In addition, the operation speed of thin film transistors in a driver circuit is improved. In a bottom-gate thin film transistor in which an oxide insulating layer is in contact with a channel formation region in an oxide semiconductor layer, a source electrode layer and a drain electrode layer are formed in such a manner that they do not overlap with a gate electrode layer. Thus, the distance between the gate electrode layer and the source electrode layer and between the gate electrode layer and the drain electrode layer are increased; accordingly, parasitic capacitance can be reduced.

摘要翻译： 提供具有能够充分降低寄生电容的结构的半导体器件。 此外，提高了驱动电路中薄膜晶体管的操作速度。 在其中氧化物绝缘层与氧化物半导体层中的沟道形成区域接触的底栅极薄膜晶体管中，以与栅极薄膜晶体管不重叠的方式形成源电极层和漏电极层， 栅电极层。 因此，栅极电极层与源电极层之间以及栅极电极层和漏极电极层之间的距离增加; 因此，可以减小寄生电容。

公开(公告)号：US20100244031A1

公开(公告)日：2010-09-30

申请号：US12725478

申请日：2010-03-17

申请人： Kengo AKIMOTO ,  Hiromichi GODO ,  Akiharu MIYANAGA

发明人： Kengo AKIMOTO ,  Hiromichi GODO ,  Akiharu MIYANAGA

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/45

摘要： The drain voltage of a transistor is determined depending on the driving voltage of an element connected to the transistor. With downsizing of a transistor, intensity of the electric field concentrated in the drain region is increased, and hot carriers are easily generated. An object is to provide a transistor in which the electric field hardly concentrates in the drain region. Another object is to provide a display device including such a transistor. End portions of first and second wiring layers having high electrical conductivity do not overlap with a gate electrode layer, whereby concentration of an electric field in the vicinity of a first electrode layer and a second electrode layer is reduced; thus, generation of hot carriers is suppressed. In addition, one of the first and second electrode layers having higher resistivity than the first and second wiring layers is used as a drain electrode layer.

摘要翻译： 晶体管的漏极电压取决于连接到晶体管的元件的驱动电压。 通过晶体管的小型化，集中在漏极区域的电场强度增加，容易产生热载流子。 目的在于提供一种晶体管，其中电场几乎不集中在漏极区域中。 另一个目的是提供一种包括这种晶体管的显示装置。 具有高导电性的第一和第二布线层的端部与栅极电极层不重叠，从而降低第一电极层和第二电极层附近的电场浓度; 因此，抑制了热载流子的产生。 此外，具有比第一和第二布线层更高的电阻率的第一和第二电极层之一被用作漏电极层。