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公开(公告)号：US20100244031A1
公开(公告)日：2010-09-30
申请号：US12725478
申请日：2010-03-17
申请人： Kengo AKIMOTO , Hiromichi GODO , Akiharu MIYANAGA
发明人： Kengo AKIMOTO , Hiromichi GODO , Akiharu MIYANAGA
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L29/41733 , H01L29/45
摘要： The drain voltage of a transistor is determined depending on the driving voltage of an element connected to the transistor. With downsizing of a transistor, intensity of the electric field concentrated in the drain region is increased, and hot carriers are easily generated. An object is to provide a transistor in which the electric field hardly concentrates in the drain region. Another object is to provide a display device including such a transistor. End portions of first and second wiring layers having high electrical conductivity do not overlap with a gate electrode layer, whereby concentration of an electric field in the vicinity of a first electrode layer and a second electrode layer is reduced; thus, generation of hot carriers is suppressed. In addition, one of the first and second electrode layers having higher resistivity than the first and second wiring layers is used as a drain electrode layer.
摘要翻译： 晶体管的漏极电压取决于连接到晶体管的元件的驱动电压。 通过晶体管的小型化，集中在漏极区域的电场强度增加，容易产生热载流子。 目的在于提供一种晶体管，其中电场几乎不集中在漏极区域中。 另一个目的是提供一种包括这种晶体管的显示装置。 具有高导电性的第一和第二布线层的端部与栅极电极层不重叠，从而降低第一电极层和第二电极层附近的电场浓度; 因此，抑制了热载流子的产生。 此外，具有比第一和第二布线层更高的电阻率的第一和第二电极层之一被用作漏电极层。
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公开(公告)号：US20120061663A1
公开(公告)日：2012-03-15
申请号：US13226713
申请日：2011-09-07
申请人： Shunpei YAMAZAKI , Yusuke NONAKA , Takayuki INOUE , Masashi TSUBUKU , Kengo AKIMOTO , Akiharu MIYANAGA
发明人： Shunpei YAMAZAKI , Yusuke NONAKA , Takayuki INOUE , Masashi TSUBUKU , Kengo AKIMOTO , Akiharu MIYANAGA
CPC分类号： H01L29/7869 , H01L21/02488 , H01L21/02554 , H01L21/02565 , H01L29/04 , H01L29/24 , H01L29/78603
摘要： An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (α-Al2O3, α-Ga2O3, In2O3, Ti2O3, V2O3, Cr2O3, or α-Fe2O3) is used.
摘要翻译： 本发明的目的是提供一种具有稳定的电气特性和高可靠性的氧化物半导体膜的半导体装置。 通过在绝缘表面上形成厚度为1nm至10nm的第一材料膜（具有六方晶体结构的膜）形成第一和第二材料膜的叠层，并形成具有六方晶系结构的第二材料膜（ 使用第一材料膜作为核的结晶氧化物半导体膜）。 作为第一材料膜，具有纤锌矿晶体结构的材料膜（例如氮化镓或氮化铝）或具有刚玉晶体结构的材料膜（α-Al 2 O 3，α-Ga 2 O 3，In 2 O 3，Ti 2 O 3，V 2 O 3，Cr 2 O 3，或 α-Fe 2 O 3）。
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公开(公告)号：US20110318875A1
公开(公告)日：2011-12-29
申请号：US13230905
申请日：2011-09-13
IPC分类号： H01L21/34
CPC分类号： H01L29/66772 , H01L29/6675 , H01L29/78618 , H01L29/7869
摘要： An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
摘要翻译： 一个实施例是包括交错（顶栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。
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公开(公告)号：US20110062436A1
公开(公告)日：2011-03-17
申请号：US12880343
申请日：2010-09-13
申请人： Shunpei YAMAZAKI , Masayuki SAKAKURA , Ryosuke WATANABE , Junichiro SAKATA , Kengo AKIMOTO , Akiharu MIYANAGA , Takuya HIROHASHI , Hideyuki KISHIDA
发明人： Shunpei YAMAZAKI , Masayuki SAKAKURA , Ryosuke WATANABE , Junichiro SAKATA , Kengo AKIMOTO , Akiharu MIYANAGA , Takuya HIROHASHI , Hideyuki KISHIDA
IPC分类号： H01L29/12
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/78618 , H01L29/78693 , H01L29/78696
摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
摘要翻译： 提供具有良好的电特性和高可靠性的晶体管以及包括该晶体管的显示装置。 晶体管是使用用于沟道区的氧化物半导体形成的底栅晶体管。 使用通过热处理进行脱水或脱氢的氧化物半导体层作为活性层。 有源层包括微结晶的浅表部分的第一区域和其余部分的第二区域。 通过使用具有这种结构的氧化物半导体层，可以抑制归因于表层部分的水分进入或从表面部分的氧的消除导致的n型变化，以及寄生通道的产生。 此外，可以减小氧化物半导体层与源极和漏极之间的接触电阻。
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公开(公告)号：US20100032667A1
公开(公告)日：2010-02-11
申请号：US12535714
申请日：2009-08-05
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L29/78618
摘要： One of the objects of the present invention is to provide a thin film transistor using an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn), in which the contact resistance between the oxide semiconductor layer and a source and drain electrodes is reduced, and to provide a method for manufacturing the thin film transistor. An ohmic contact is formed by intentionally providing a buffer layer having a higher carrier concentration than the IGZO semiconductor layer between the IGZO semiconductor layer and the source and drain electrode layers.
摘要翻译： 本发明的目的之一是提供一种使用含有铟（In），镓（Ga）和锌（Zn））的氧化物半导体膜的薄膜晶体管，其中氧化物半导体层和源极之间的接触电阻 并且减少了漏电极，并且提供了制造薄膜晶体管的方法。 通过有意地提供具有比IGZO半导体层和源极和漏极电极层之间的IGZO半导体层更高的载流子浓度的缓冲层来形成欧姆接触。
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公开(公告)号：US20120273780A1
公开(公告)日：2012-11-01
申请号：US13547377
申请日：2012-07-12
IPC分类号： H01L29/12
CPC分类号： H01L29/78618 , G02F1/133345 , G02F1/133528 , G02F1/134336 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G02F1/167 , G02F2201/123 , G09G3/3674 , G09G2310/0286 , H01L27/1225 , H01L27/3262 , H01L29/247 , H01L29/66969 , H01L29/78648 , H01L29/7869 , H01L29/78693 , H01L29/78696
摘要： An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
摘要翻译： 一个实施例是包括反向交错（底栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 电极层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。
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公开(公告)号：US20120256179A1
公开(公告)日：2012-10-11
申请号：US13528009
申请日：2012-06-20
申请人： Shunpei YAMAZAKI , Masayuki SAKAKURA , Ryosuke WATANABE , Junichiro SAKATA , Kengo AKIMOTO , Akiharu MIYANAGA , Takuya HIROHASHI , Hideyuki KISHIDA
发明人： Shunpei YAMAZAKI , Masayuki SAKAKURA , Ryosuke WATANABE , Junichiro SAKATA , Kengo AKIMOTO , Akiharu MIYANAGA , Takuya HIROHASHI , Hideyuki KISHIDA
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/78618 , H01L29/78693 , H01L29/78696
摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
摘要翻译： 提供具有良好的电特性和高可靠性的晶体管以及包括该晶体管的显示装置。 晶体管是使用用于沟道区的氧化物半导体形成的底栅晶体管。 使用通过热处理进行脱水或脱氢的氧化物半导体层作为活性层。 有源层包括微结晶的浅表部分的第一区域和其余部分的第二区域。 通过使用具有这种结构的氧化物半导体层，可以抑制归因于表层部分的水分进入或从表面部分的氧的消除导致的n型变化，以及寄生通道的产生。 此外，可以减小氧化物半导体层与源极和漏极之间的接触电阻。
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公开(公告)号：US20120138922A1
公开(公告)日：2012-06-07
申请号：US13307398
申请日：2011-11-30
申请人： Shunpei YAMAZAKI , Masashi TSUBUKU , Kengo AKIMOTO , Hiroki OHARA , Tatsuya HONDA , Takatsugu OMATA , Yusuke NONAKA , Masahiro TAKAHASHI , Akiharu MIYANAGA
发明人： Shunpei YAMAZAKI , Masashi TSUBUKU , Kengo AKIMOTO , Hiroki OHARA , Tatsuya HONDA , Takatsugu OMATA , Yusuke NONAKA , Masahiro TAKAHASHI , Akiharu MIYANAGA
IPC分类号： H01L29/12
CPC分类号： H01L29/78696 , H01L29/045 , H01L29/1033 , H01L29/247 , H01L29/7869 , H01L29/78693
摘要： An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.
摘要翻译： 提供了具有更稳定的导电性的氧化物半导体膜。 此外，通过使用氧化物半导体膜提供具有稳定的电特性和高可靠性的半导体器件。 氧化物半导体膜包括结晶区域，并且结晶区域包括其中a-b平面基本上平行于膜的表面并且c轴基本上垂直于膜的表面的晶体; 氧化物半导体膜具有稳定的导电性，并且相对于可见光，紫外线等的照射而言更加电稳定。 通过使用这种用于晶体管的氧化物半导体膜，可以提供具有稳定电特性的高可靠性半导体器件。
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公开(公告)号：US20100032665A1
公开(公告)日：2010-02-11
申请号：US12535711
申请日：2009-08-05
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L29/66772 , H01L29/6675 , H01L29/78618 , H01L29/7869
摘要： An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
摘要翻译： 一个实施例是包括交错（顶栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。
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公开(公告)号：US20100025679A1
公开(公告)日：2010-02-04
申请号：US12511291
申请日：2009-07-29
IPC分类号： H01L33/00
CPC分类号： H01L29/78618 , G02F1/133345 , G02F1/133528 , G02F1/134336 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G02F1/167 , G02F2201/123 , G09G3/3674 , G09G2310/0286 , H01L27/1225 , H01L27/3262 , H01L29/247 , H01L29/66969 , H01L29/78648 , H01L29/7869 , H01L29/78693 , H01L29/78696
摘要： An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
摘要翻译： 一个实施例是包括反向交错（底栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极 电极层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。
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