Dynamic, adaptive power control for a half-duplex wireless communication system
    7.
    发明申请
    Dynamic, adaptive power control for a half-duplex wireless communication system 有权
    一种半双工无线通信系统的动态,自适应功率控制

    公开(公告)号:US20070230407A1

    公开(公告)日:2007-10-04

    申请号:US11394418

    申请日:2006-03-31

    IPC分类号: H04B7/212

    CPC分类号: H04W52/225

    摘要: The power of a signal transmitted from a mobile terminal of a half-duplex TDMA communication system to a base station is controlled by collecting data relating to bit errors in the transmitted signal received on an inbound channel, generating a time-varying statistic of the data. If the time varying statistic indicates that the power should be adjusted, a power control command is embedded in one or more time slots of an outbound channel to the mobile terminal to change the power of the signal. The data may be the bit error rate (BER) reported by a forward error correction decoder and/or returned signal strength information (RSSI). The time varying statistic may be the moving average and standard deviation of the data.

    摘要翻译: 从半双工TDMA通信系统的移动终端发送到基站的信号的功率通过收集与在入站信道上接收到的发送信号中的比特错误有关的数据来进行控制,生成数据的时变统计 。 如果时变统计量表示应该调整功率,则将功率控制命令嵌入到移动终端的出站信道的一个或多个时隙中以改变信号的功率。 数据可以是由前向纠错解码器和/或返回的信号强度信息(RSSI)报告的误码率(BER)。 时变统计量可能是数据的移动平均值和标准偏差。

    Single chip network adapter apparatus
    8.
    发明授权
    Single chip network adapter apparatus 失效
    单芯片网络适配器装置

    公开(公告)号:US5887187A

    公开(公告)日:1999-03-23

    申请号:US839464

    申请日:1997-04-14

    摘要: A single chip network adapter apparatus has each component disposed on a single semiconductor chip. The network adapter includes a host interface circuit which is adapted for connection directly to a host system bus. The host interface circuit sends information to and receives information form the host system bus, and has random access memory coupled thereto. A processor is coupled to the random access memory and formats information received from the host system bus to a network protocol format. The processor also converts information received in a network protocol format to a form suitable for the host system bus. A network interface circuit is coupled to the random access memory and is adapted for connection directly to a network. The network interface circuit sends information formatted by the processor to the network and receives information to be converted by the processor from the network.

    摘要翻译: 单芯片网络适配器装置具有设置在单个半导体芯片上的每个部件。 网络适​​配器包括适于直接连接到主机系统总线的主机接口电路。 主机接口电路向主机系统总线发送信息并从主机系统总线接收信息,并具有耦合到其的随机存取存储器。 处理器耦合到随机存取存储器并将从主机系统总线接收的信息格式化为网络协议格式。 处理器还将以网络协议格式接收的信息转换为适合于主机系统总线的形式。 网络接口电路耦合到随机存取存储器,并适于直接连接到网络。 网络接口电路将由处理器格式化的信息发送到网络,并接收由处理器从网络转换的信息。