Optoelectrical package
    2.
    发明授权
    Optoelectrical package 失效
    光电封装

    公开(公告)号:US07418163B2

    公开(公告)日:2008-08-26

    申请号:US10109313

    申请日:2002-03-28

    IPC分类号: G02B6/12

    摘要: An integrated optoelectrical package for optoelectrical integrated circuits (ICs) is disclosed. The package includes a package substrate having contact receiving members on an upper surface. The contact receiving members are electrically connected to contacts on the lower surface. An optoelectronic receiver package and an optoelectronic transmitter package are each electrically mounted to respective first and second subsets of the contact receiving members. Input and output waveguide arrays are formed atop the substrate package and are optically coupled to the optoelectronic receiver package and the optoelectronic transmitter package, respectively. The contacts on the lower surface of the package substrate are designed to contact and engage the contact receiving members of a standard printed circuit board (PCB).

    摘要翻译: 公开了一种用于光电集成电路(IC)的集成光电封装。 该封装包括在上表面上具有接触部件的封装基板。 触点接收构件电连接到下表面上的触点。 光电子接收器封装和光电发射器封装各自电连接到触点容纳部件的相应的第一和第二子集。 输入和输出波导阵列形成在衬底封装的顶部,并分别光耦合到光电接收器封装和光电发射器封装。 封装基板的下表面上的触点被设计成接触和接合标准印刷电路板(PCB)的触点接收构件。

    Feedback loop for LC VCO
    4.
    发明授权
    Feedback loop for LC VCO 有权
    LC VCO的反馈回路

    公开(公告)号:US07026883B2

    公开(公告)日:2006-04-11

    申请号:US10801395

    申请日:2004-03-12

    IPC分类号: H03B5/04

    摘要: A voltage-controlled oscillator includes an inductor capacitor (LC) tank; a drive circuit having a current source; and a feedback loop circuit. The feedback loop includes a peak detect circuit to generate a peak detect voltage; a reference voltage generator to generate a single reference voltage; and an operational amplifier, coupled to the peak detect circuit and the reference voltage generator, to generate an analog bias signal to adjust a current of the current source.

    摘要翻译: 压控振荡器包括电感电容器(LC)箱; 具有电流源的驱动电路; 和反馈回路电路。 反馈回路包括产生峰值检测电压的峰值检测电路; 参考电压发生器,用于产生单个参考电压; 以及耦合到峰值检测电路和参考电压发生器的运算放大器,以产生模拟偏置信号以调节电流源的电流。

    POSITIVE DISPLACEMENT FLUID FLOW METER
    7.
    发明申请
    POSITIVE DISPLACEMENT FLUID FLOW METER 失效
    积极位移流体流量计

    公开(公告)号:US20100300199A1

    公开(公告)日:2010-12-02

    申请号:US11990169

    申请日:2006-08-10

    IPC分类号: G01F3/08

    CPC分类号: G01F3/08

    摘要: A positive displacement fluid flow meter comprises a chamber having a fluid inlet and a fluid outlet. A rotor is displaceable within the chamber, rotation of the rotor being related to the volume of fluid passing through the chamber. The chamber has a surface proximate which an end surface of the rotor passes, the chamber surface and/or the rotor end surface having at least one recess to retain at least a portion of debris carried by the metered fluid. The recess is preferably formed so as not to provide fluid, communication, from the inlet to the outlet across the rotor end surface. A lid closes an end of the chamber which in use is subject to the pressure of fluid within the chamber. The lid is engaged at its periphery to a wall of the chamber, and is preferably flexible adjacent its periphery to reduce the transmission of bending stresses between the periphery of the lid and the remainder thereof.

    摘要翻译: 正排量流体流量计包括具有流体入口和流体出口的室。 转子可在腔室内移动,转子的旋转与通过腔室的流体体积相关。 腔室具有靠近转子的端表面的表面,腔室表面和/或转子端表面具有至少一个凹部以保持由计量流体携带的碎屑的至少一部分。 凹部优选地形成为不使流体从转子端表面的入口到出口提供流体。 盖子封闭了腔室的一端,在使用过程中受到室内流体的压力的影响。 盖子在其周边处接合到室的壁上,并且优选地邻近其周边是柔性的,以减小盖的周边与其余部分之间的弯曲应力的传递。

    Detuned duo-cavity laser-modulator device and method with detuning selected to minimize change in reflectivity
    8.
    发明授权
    Detuned duo-cavity laser-modulator device and method with detuning selected to minimize change in reflectivity 有权
    选择失谐二腔激光调制器装置和失谐方法以最小化反射率变化

    公开(公告)号:US07508858B2

    公开(公告)日:2009-03-24

    申请号:US11742049

    申请日:2007-04-30

    IPC分类号: H01S3/08

    摘要: A detuned duo-cavity laser-modulator device and method are provided which include lower, middle and upper reflectors, a gain region and an absorber region integrated into a semiconductor die. The middle reflector is disposed between the lower and upper reflectors. Together, the lower and middle reflectors define a first resonant cavity, while the upper and middle reflectors define a second resonant cavity. A gain region is disposed within a laser cavity of the resonant cavities to generate an optical carrier wave, while an absorber region is disposed within a modulator cavity of the resonant cavities to modulate a signal on the optical carrier wave. The laser and modulator cavities are detuned resonant cavities, with the detuning of the laser and modulator cavities being selected to minimized change in reflection from the modulator cavity to the laser cavity when the absorber region modulates the signal on the optical carrier wave.

    摘要翻译: 提供了一种失谐的二腔激光调制装置和方法,其包括下反射器,中上反射器和上反射器,集成到半导体管芯中的增益区域和吸收器区域。 中间反射器设置在下反射器和上反射器之间。 一起,下反射器和中间反射器限定第一谐振腔,而上反射器和中反射器限定第二谐振腔。 增益区域设置在谐振腔的激光腔内以产生光载波,而吸收体区域设置在谐振腔的调制器腔内,以调制光载波上的信号。 激光器和调制器腔是失谐的谐振腔,当吸收器区域调制光载波上的信号时,激光器和调制器腔的失谐被选择为使得从调制器腔到激光腔的反射最小化。

    Low power, low phase jitter, and duty cycle error insensitive clock receiver architecture and circuits for source synchronous digital data communication
    9.
    发明授权
    Low power, low phase jitter, and duty cycle error insensitive clock receiver architecture and circuits for source synchronous digital data communication 失效
    低功耗,低相位抖动和占空比误差不敏感的时钟接收器架构和电路用于源同步数字数据通信

    公开(公告)号:US07501869B2

    公开(公告)日:2009-03-10

    申请号:US11592594

    申请日:2006-11-03

    IPC分类号: H03L7/06

    摘要: A clock receiver architecture for source synchronous digital data communication, the receiver including a forwarded clock amplifier to provide the received forwarded clock signal to a plurality of delay locked loops. Each delay locked loops provides to one or more phase interpolators a set of clock signals generated from the received forwarded clock, where the relative phases of the set of clock signals are uniformly spaced. Phase interpolators interpolate between two adjacent (with respect to phase) clock signals so as to provide a clock signal to sample received data at the center of the data eye. In some embodiments, an on-die voltage regulator provides a regulated supply voltage to the delay locked loops and phase interpolators. In some embodiments, pull-up currents and pull-down currents in the phase locked loops and phase interpolators are matched across process, supply voltage, and temperature variations so that the relative phases of the clock signals are insensitive across process, supply voltage, and temperature variations. Other embodiments are described and claimed.

    摘要翻译: 一种用于源同步数字数据通信的时钟接收器架构,接收器包括转发的时钟放大器,以将接收到的转发时钟信号提供给多个延迟锁定环路。 每个延迟锁定环路向一个或多个相位内插器提供从接收的转发时钟生成的一组时钟信号,其中该组时钟信号的相对相位是均匀间隔的。 相位插值器在两个相邻(相对于相位)时钟信号之间插值,以便提供一个时钟信号来对数据眼睛中心的接收数据进行采样。 在一些实施例中,片上电压调节器向延迟锁定环路和相位内插器提供稳定的电源电压。 在一些实施例中,锁相环和相位内插器中的上拉电流和下拉电流在过程,电源电压和温度变化之间匹配,使得时钟信号的相对相位在过程,电源电压和 温度变化。 描述和要求保护其他实施例。

    Forming a surface-mount opto-electrical subassembly (SMOSA)
    10.
    发明申请
    Forming a surface-mount opto-electrical subassembly (SMOSA) 审中-公开
    形成表面贴装光电子组件(SMOSA)

    公开(公告)号:US20090003763A1

    公开(公告)日:2009-01-01

    申请号:US11823933

    申请日:2007-06-29

    IPC分类号: G02B6/12

    摘要: In one embodiment, the present invention includes an apparatus having a three-dimensional (3D) interconnect with a first cavity and a second cavity, and an integrated device formed of an electronic integrated circuit (IC) bonded to at least one optoelectronic (OE) die. The integrated device is bonded to the 3D interconnect and at least partially extends into the second cavity. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括具有第一空腔和第二空腔的三维(3D)互连的装置,以及由电子集成电路(IC)形成的集成装置,该电子集成电路与至少一个光电子(OE) 死。 集成器件被结合到3D互连件并且至少部分延伸到第二腔中。 描述和要求保护其他实施例。