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    POSITIVE DISPLACEMENT FLUID FLOW METER
    4.
    发明申请
    POSITIVE DISPLACEMENT FLUID FLOW METER 失效
    积极位移流体流量计

    公开(公告)号：US20100300199A1

    公开(公告)日：2010-12-02

    申请号：US11990169

    申请日：2006-08-10

    申请人： Ian Holmes Higgin ,  Ian Young ,  Ivor Rogers

    发明人： Ian Holmes Higgin ,  Ian Young ,  Ivor Rogers

    IPC分类号： G01F3/08

    CPC分类号： G01F3/08

    摘要： A positive displacement fluid flow meter comprises a chamber having a fluid inlet and a fluid outlet. A rotor is displaceable within the chamber, rotation of the rotor being related to the volume of fluid passing through the chamber. The chamber has a surface proximate which an end surface of the rotor passes, the chamber surface and/or the rotor end surface having at least one recess to retain at least a portion of debris carried by the metered fluid. The recess is preferably formed so as not to provide fluid, communication, from the inlet to the outlet across the rotor end surface. A lid closes an end of the chamber which in use is subject to the pressure of fluid within the chamber. The lid is engaged at its periphery to a wall of the chamber, and is preferably flexible adjacent its periphery to reduce the transmission of bending stresses between the periphery of the lid and the remainder thereof.

    摘要翻译： 正排量流体流量计包括具有流体入口和流体出口的室。 转子可在腔室内移动，转子的旋转与通过腔室的流体体积相关。 腔室具有靠近转子的端表面的表面，腔室表面和/或转子端表面具有至少一个凹部以保持由计量流体携带的碎屑的至少一部分。 凹部优选地形成为不使流体从转子端表面的入口到出口提供流体。 盖子封闭了腔室的一端，在使用过程中受到室内流体的压力的影响。 盖子在其周边处接合到室的壁上，并且优选地邻近其周边是柔性的，以减小盖的周边与其余部分之间的弯曲应力的传递。

    Detuned duo-cavity laser-modulator device and method with detuning selected to minimize change in reflectivity
    5.
    发明授权
    Detuned duo-cavity laser-modulator device and method with detuning selected to minimize change in reflectivity 有权
    选择失谐二腔激光调制器装置和失谐方法以最小化反射率变化

    公开(公告)号：US07508858B2

    公开(公告)日：2009-03-24

    申请号：US11742049

    申请日：2007-04-30

    申请人： Serge Oktyabrsky ,  Vadim Tokranov ,  Michael Yakimov ,  Jobert VanEisden ,  Edris M. Mohammed ,  Ian Young

    发明人： Serge Oktyabrsky ,  Vadim Tokranov ,  Michael Yakimov ,  Jobert VanEisden ,  Edris M. Mohammed ,  Ian Young

    IPC分类号： H01S3/08

    CPC分类号： H01S5/18302 ,  H01S5/0425 ,  H01S5/06226 ,  H01S5/1021 ,  H01S5/1039 ,  H01S5/18311 ,  H01S5/18352 ,  H01S5/18358 ,  H01S5/3095 ,  H01S2301/176

    摘要： A detuned duo-cavity laser-modulator device and method are provided which include lower, middle and upper reflectors, a gain region and an absorber region integrated into a semiconductor die. The middle reflector is disposed between the lower and upper reflectors. Together, the lower and middle reflectors define a first resonant cavity, while the upper and middle reflectors define a second resonant cavity. A gain region is disposed within a laser cavity of the resonant cavities to generate an optical carrier wave, while an absorber region is disposed within a modulator cavity of the resonant cavities to modulate a signal on the optical carrier wave. The laser and modulator cavities are detuned resonant cavities, with the detuning of the laser and modulator cavities being selected to minimized change in reflection from the modulator cavity to the laser cavity when the absorber region modulates the signal on the optical carrier wave.

    摘要翻译： 提供了一种失谐的二腔激光调制装置和方法，其包括下反射器，中上反射器和上反射器，集成到半导体管芯中的增益区域和吸收器区域。 中间反射器设置在下反射器和上反射器之间。 一起，下反射器和中间反射器限定第一谐振腔，而上反射器和中反射器限定第二谐振腔。 增益区域设置在谐振腔的激光腔内以产生光载波，而吸收体区域设置在谐振腔的调制器腔内，以调制光载波上的信号。 激光器和调制器腔是失谐的谐振腔，当吸收器区域调制光载波上的信号时，激光器和调制器腔的失谐被选择为使得从调制器腔到激光腔的反射最小化。

    Low power, low phase jitter, and duty cycle error insensitive clock receiver architecture and circuits for source synchronous digital data communication
    6.
    发明授权
    Low power, low phase jitter, and duty cycle error insensitive clock receiver architecture and circuits for source synchronous digital data communication 失效
    低功耗，低相位抖动和占空比误差不敏感的时钟接收器架构和电路用于源同步数字数据通信

    公开(公告)号：US07501869B2

    公开(公告)日：2009-03-10

    申请号：US11592594

    申请日：2006-11-03

    申请人： Yongping Fan ,  Ian Young

    发明人： Yongping Fan ,  Ian Young

    IPC分类号： H03L7/06

    CPC分类号： H03L7/0812 ,  H03L7/07 ,  H03L7/0805 ,  H03L7/0891

    摘要： A clock receiver architecture for source synchronous digital data communication, the receiver including a forwarded clock amplifier to provide the received forwarded clock signal to a plurality of delay locked loops. Each delay locked loops provides to one or more phase interpolators a set of clock signals generated from the received forwarded clock, where the relative phases of the set of clock signals are uniformly spaced. Phase interpolators interpolate between two adjacent (with respect to phase) clock signals so as to provide a clock signal to sample received data at the center of the data eye. In some embodiments, an on-die voltage regulator provides a regulated supply voltage to the delay locked loops and phase interpolators. In some embodiments, pull-up currents and pull-down currents in the phase locked loops and phase interpolators are matched across process, supply voltage, and temperature variations so that the relative phases of the clock signals are insensitive across process, supply voltage, and temperature variations. Other embodiments are described and claimed.

    摘要翻译： 一种用于源同步数字数据通信的时钟接收器架构，接收器包括转发的时钟放大器，以将接收到的转发时钟信号提供给多个延迟锁定环路。 每个延迟锁定环路向一个或多个相位内插器提供从接收的转发时钟生成的一组时钟信号，其中该组时钟信号的相对相位是均匀间隔的。 相位插值器在两个相邻（相对于相位）时钟信号之间插值，以便提供一个时钟信号来对数据眼睛中心的接收数据进行采样。 在一些实施例中，片上电压调节器向延迟锁定环路和相位内插器提供稳定的电源电压。 在一些实施例中，锁相环和相位内插器中的上拉电流和下拉电流在过程，电源电压和温度变化之间匹配，使得时钟信号的相对相位在过程，电源电压和 温度变化。 描述和要求保护其他实施例。

    Forming a surface-mount opto-electrical subassembly (SMOSA)
    7.
    发明申请
    Forming a surface-mount opto-electrical subassembly (SMOSA) 审中-公开
    形成表面贴装光电子组件（SMOSA）

    公开(公告)号：US20090003763A1

    公开(公告)日：2009-01-01

    申请号：US11823933

    申请日：2007-06-29

    申请人： Edris M. Mohammed ,  Ian Young

    发明人： Edris M. Mohammed ,  Ian Young

    IPC分类号： G02B6/12

    CPC分类号： G02B6/4292 ,  G02B6/4249 ,  G02B6/43 ,  H01L31/0203

    摘要： In one embodiment, the present invention includes an apparatus having a three-dimensional (3D) interconnect with a first cavity and a second cavity, and an integrated device formed of an electronic integrated circuit (IC) bonded to at least one optoelectronic (OE) die. The integrated device is bonded to the 3D interconnect and at least partially extends into the second cavity. Other embodiments are described and claimed.

    摘要翻译： 在一个实施例中，本发明包括具有第一空腔和第二空腔的三维（3D）互连的装置，以及由电子集成电路（IC）形成的集成装置，该电子集成电路与至少一个光电子（OE） 死。 集成器件被结合到3D互连件并且至少部分延伸到第二腔中。 描述和要求保护其他实施例。

    FAST LOCKING MECHANISM FOR DELAY LOCK LOOPS AND PHASE LOCK LOOPS
    8.
    发明申请
    FAST LOCKING MECHANISM FOR DELAY LOCK LOOPS AND PHASE LOCK LOOPS 有权
    快速锁定机构用于延迟锁定和相位锁定

    公开(公告)号：US20070216454A1

    公开(公告)日：2007-09-20

    申请号：US11374808

    申请日：2006-03-14

    申请人： Yongping Fan ,  Ian Young

    发明人： Yongping Fan ,  Ian Young

    IPC分类号： H03L7/06

    CPC分类号： H03L7/0812 ,  G11C7/1072 ,  G11C7/22 ,  G11C7/222 ,  G11C11/4076 ,  H03L7/0891 ,  H03L7/10

    摘要： A fast lock mechanism for delay lock loops and phase lock loops. A first circuit is coupled to receive an input clock signal and to generate an output clock signal responsive to the input clock signal. The first circuit includes a charge pump and delay cells. The charge pump generates an operational bias voltage during operation of the first circuit to control a delay of the delay cells. A fast lock circuit is coupled to an output of the charge pump to precharge the output of the charge pump with a startup bias voltage prior to enabling the charge pump.

    摘要翻译： 用于延迟锁定环和锁相环的快速锁定机制。 第一电路被耦合以接收输入时钟信号并响应于输入时钟信号产生输出时钟信号。 第一电路包括电荷泵和延迟单元。 电荷泵在第一电路的操作期间产生操作偏置电压以控制延迟单元的延迟。 快速锁定电路耦合到电荷泵的输出端，以在启用电荷泵之前以启动偏置电压对电荷泵的输出进行预充电。

    Multi-waveguide layer H-tree distribution device
    9.
    发明授权
    Multi-waveguide layer H-tree distribution device 有权
    多波导层H树分布装置

    公开(公告)号：US06876794B2

    公开(公告)日：2005-04-05

    申请号：US10364624

    申请日：2003-02-10

    申请人： Jun-Fei Zheng ,  Ian Young

    发明人： Jun-Fei Zheng ,  Ian Young

    IPC分类号： G02B6/12 ,  G02B6/125 ,  G02B6/43 ,  G02B6/26

    CPC分类号： G02B6/125 ,  G02B6/43 ,  G02B2006/1215

    摘要： An optical network is formed of multiple H-tree distribution devices, separated into different waveguide layers. The optical network receives an input optical signal, such as an optical clock signal, and makes duplicate copies of that input signal. The duplicate copies are routed through the connected H-tree distribution devices, which are arranged to produce identical, synchronized copies of the clock signal. The network can take the form of a 1×2N device, where 2N represents the number of these output signals. The H-tree distribution devices forming the network are of varying size and may be formed in different waveguide layers with different index of refraction differentials between the H-tree devices and surrounding claddings. In some forms, the optical network is integrated with optical-to-electrical converters, i.e., photodetectors, which take the optical output signals and convert them to synchronized electrical signals that may be communicated to digital circuits.

    摘要翻译： 光网络由多个H树分布设备组成，分离成不同的波导层。 光网络接收诸如光时钟信号的输入光信号，并且重复该输入信号。 复制副本通过连接的H树分发设备进行路由，这些设备被配置为产生相同的同步的时钟信号副本。 网络可以采取1x2 设备的形式，其中2 表示这些输出信号的数量。 形成网络的H树分布设备具有不同的尺寸，并且可以形成在H树设备和周围包层之间具有不同折射率差异的不同波导层中。 在一些形式中，光网络与光电转换器（即，光电检测器）集成，其获取光输出信号并将其转换为可传送到数字电路的同步电信号。

    Multiple VCO phase lock loop architecture
    10.
    发明授权
    Multiple VCO phase lock loop architecture 有权
    多个VCO锁相环结构

    公开(公告)号：US06670833B2

    公开(公告)日：2003-12-30

    申请号：US10052264

    申请日：2002-01-23

    申请人： Nasser A. Kurd ,  Ian Young

    发明人： Nasser A. Kurd ,  Ian Young

    IPC分类号： H03L706

    CPC分类号： H03L7/0893 ,  H03L7/0896 ,  H03L7/099 ,  Y10S331/02

    摘要： A VCO phase lock loop system may include a first voltage controlled oscillator that provides a first oscillation signal relative to a first frequency and a second voltage controlled oscillator that provide a second oscillation signal relative to a second frequency. A loop filter capacitor may be associated with both the first voltage controlled oscillator and the second voltage controlled oscillator. A selection device may enable components associated with the either one of the voltage controlled oscillators while disabling components associated with the other one of the voltage controlled oscillators.

    摘要翻译： VCO锁相环系统可以包括提供相对于第一频率的第一振荡信号的第一压控振荡器和相对于第二频率提供第二振荡信号的第二压控振荡器。 环路滤波电容器可以与第一压控振荡器和第二压控振荡器两者相关联。 选择装置可以启用与压控振荡器中的任一个相关联的组件，同时禁用与压控振荡器中的另一个相关联的组件。