公开(公告)号：US20120112191A1

公开(公告)日：2012-05-10

申请号：US13270455

申请日：2011-10-11

申请人： Kiyoshi KATO ,  Yutaka SHIONOIRI ,  Shuhei NAGATSUKA ,  Yuto YAKUBO ,  Jun KOYAMA

发明人： Kiyoshi KATO ,  Yutaka SHIONOIRI ,  Shuhei NAGATSUKA ,  Yuto YAKUBO ,  Jun KOYAMA

IPC分类号： H01L29/16

CPC分类号： H01L27/1156 ,  G11C11/403 ,  G11C16/0433 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1225 ,  H01L28/40

摘要： A data retention period in a semiconductor device or a semiconductor memory device is lengthened. The semiconductor device or the semiconductor memory includes a memory circuit including a first transistor including a first semiconductor layer and a first gate and a second transistor including a second semiconductor layer, a second gate, and a third gate The first semiconductor layer is formed at the same time as a layer including the second gate.

摘要翻译： 半导体器件或半导体存储器件中的数据保持期延长。 半导体器件或半导体存储器包括存储电路，该存储器电路包括第一晶体管，其包括第一半导体层和第一栅极，第二晶体管包括第二半导体层，第二栅极和第三栅极。第一半导体层形成在 与包括第二门的层相同。

公开(公告)号：US20110156025A1

公开(公告)日：2011-06-30

申请号：US12976340

申请日：2010-12-22

申请人： Yutaka SHIONOIRI ,  Hiroyuki MIYAKE ,  Kiyoshi KATO

发明人： Yutaka SHIONOIRI ,  Hiroyuki MIYAKE ,  Kiyoshi KATO

IPC分类号： H01L29/12

CPC分类号： H01L27/1052 ,  G11C16/0433 ,  H01L27/115 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/13 ,  H01L29/78648 ,  H01L29/7869

摘要： It is an object to provide a memory device whose power consumption can be suppressed and a semiconductor device including the memory device. As a switching element for holding electric charge accumulated in a transistor which functions as a memory element, a transistor including an oxide semiconductor film as an active layer is provided for each memory cell in the memory device. The transistor which is used as a memory element has a first gate electrode, a second gate electrode, a semiconductor film located between the first gate electrode and the second gate electrode, a first insulating film located between the first gate electrode and the semiconductor film, a second insulating film located between the second gate electrode and the semiconductor film, and a source electrode and a drain electrode in contact with the semiconductor film.

摘要翻译： 本发明的目的是提供一种能够抑制功耗的存储器件和包括存储器件的半导体器件。 作为用作保持蓄积在用作存储元件的晶体管中的电荷的开关元件，为存储器件中的每个存储单元提供包括作为有源层的氧化物半导体膜的晶体管。 用作存储元件的晶体管具有第一栅电极，第二栅电极，位于第一栅电极和第二栅电极之间的半导体膜，位于第一栅电极和半导体膜之间的第一绝缘膜， 位于第二栅电极和半导体膜之间的第二绝缘膜，以及与半导体膜接触的源电极和漏电极。

公开(公告)号：US20120268164A1

公开(公告)日：2012-10-25

申请号：US13437961

申请日：2012-04-03

申请人： Hidetomo KOBAYASHI ,  Masami ENDO ,  Yutaka SHIONOIRI ,  Hiroki DEMBO ,  Tatsuji NISHIJIMA ,  Kazuaki OHSHIMA ,  Seiichi YONEDA ,  Jun KOYAMA

发明人： Hidetomo KOBAYASHI ,  Masami ENDO ,  Yutaka SHIONOIRI ,  Hiroki DEMBO ,  Tatsuji NISHIJIMA ,  Kazuaki OHSHIMA ,  Seiichi YONEDA ,  Jun KOYAMA

IPC分类号： H03K19/094

CPC分类号： H03K19/17796 ,  G11C16/0433 ,  H01L27/11803 ,  H01L27/1203

摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.

摘要翻译： 提供了可以执行动态配置的低功耗可编程LSI。 可编程LSI包括多个逻辑元件。 多个逻辑元件各自包括配置存储器。 多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。 配置存储器包括一组易失性存储电路和非易失性存储电路。 非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

公开(公告)号：US20100289331A1

公开(公告)日：2010-11-18

申请号：US12841381

申请日：2010-07-22

申请人： Yutaka SHIONOIRI ,  Jun KOYAMA ,  Yoshiyuki KUROKAWA ,  Shunpei YAMAZAKI ,  Takayuki IKEDA ,  Takeshi OSADA ,  Tomoaki ATSUMI ,  Masato ISHII

发明人： Yutaka SHIONOIRI ,  Jun KOYAMA ,  Yoshiyuki KUROKAWA ,  Shunpei YAMAZAKI ,  Takayuki IKEDA ,  Takeshi OSADA ,  Tomoaki ATSUMI ,  Masato ISHII

IPC分类号： B60L1/00 ,  H02J7/00

CPC分类号： H02J7/0052 ,  B60L8/003 ,  B60L11/182 ,  B60L2230/16 ,  H02J7/025 ,  H02J17/00 ,  H02J50/12 ,  H02J50/20 ,  H02J50/40 ,  H02J50/90 ,  Y02T10/7011 ,  Y02T10/7083 ,  Y02T10/7088 ,  Y02T90/122 ,  Y02T90/128 ,  Y02T90/14 ,  Y02T90/163

摘要： To provide for a movable electronic device a power receiving device that when charging a battery, simplifies charging of the battery from a power feeder, which is a power supply means, and does not have faults due to an external factor relating to a relay terminal, or damage of the relay terminal, that are caused by directly connecting the battery and the power feeder, and further, to provide an electronic device including the power receiving device. An antenna circuit and a booster antenna for supplying electric power are provided in a movable electronic device. The antenna circuit receives a radio signal such as an electromagnetic wave via the booster antenna, and electric power that is obtained through the receiving of the radio signal is supplied to the battery through a signal processing circuit.

摘要翻译： 为了提供可移动电子装置，一种电力接收装置，其在对电池充电时，简化从作为电源装置的供电器的电池的充电，并且由于与中继端子有关的外部因素而没有故障， 或由直接连接电池和馈电器引起的继电器端子的损坏，并且还提供包括电力接收装置的电子设备。 在可移动电子装置中设置用于提供电力的天线电路和增强天线。 天线电路通过增强天线接收诸如电磁波的无线电信号，并且通过接收无线电信号获得的电力通过信号处理电路被提供给电池。

公开(公告)号：US20120043388A1

公开(公告)日：2012-02-23

申请号：US13287569

申请日：2011-11-02

申请人： Toshihiko SAITO ,  Yutaka SHIONOIRI ,  Kiyoshi KATO

发明人： Toshihiko SAITO ,  Yutaka SHIONOIRI ,  Kiyoshi KATO

IPC分类号： G06K19/06

CPC分类号： H01L27/12 ,  G06K19/0701 ,  G06K19/0715 ,  G06K19/0723 ,  H01L21/84

摘要： An object of the present invention is to provide a semiconductor device which can obtain the high potential necessary for writing data to a memory, using a small circuit area. In the present invention, by using as input voltage of a booster circuit not the conventionally used output VDD of a regulator circuit 104, but rather an output VDD0 of a rectifier circuit portion 103, which is a higher potential than the VDD, the high potential necessary for writing data to a memory can be obtained with a small circuit area.

摘要翻译： 本发明的目的是提供一种使用小电路区域可以获得将数据写入存储器所需的高电位的半导体器件。 在本发明中，通过使用升压电路的输入电压而不是调节器电路104的常规使用的输出VDD，而是使用比VDD高的电压的整流电路部分103的输出VDD0， 可以以小的电路面积获得将数据写入存储器所必需的。

公开(公告)号：US20120281469A1

公开(公告)日：2012-11-08

申请号：US13459537

申请日：2012-04-30

申请人： Hiroyuki TOMATSU ,  Hidetomo KOBAYASHI ,  Yutaka SHIONOIRI

发明人： Hiroyuki TOMATSU ,  Hidetomo KOBAYASHI ,  Yutaka SHIONOIRI

IPC分类号： G11C11/40 ,  H01L27/108

CPC分类号： H01L27/1156 ,  G11C7/02 ,  G11C11/4085 ,  G11C11/4091 ,  G11C11/4094

摘要： Noise generated on a word line is reduced without increasing a load on the word line. A semiconductor device is provided in which a plurality of storage elements each including at least one switching element are provided in matrix; each of the plurality of storage elements is electrically connected to a word line and a bit line; the word line is connected to a gate (or a source and a drain) of a transistor in which minority carriers do not exist substantially; and capacitance of the transistor in which minority carriers do not exist substantially can be controlled by controlling a potential of a source and a drain (or a gate) the transistor in which minority carriers do not exist substantially. The transistor in which minority carriers do not exist substantially may include a wide band gap semiconductor.

摘要翻译： 在字线上产生的噪声减小，而不增加字线上的负载。 提供一种半导体器件，其中包括至少一个开关元件的多个存储元件设置为矩阵; 多个存储元件中的每一个电连接到字线和位线; 字线连接到其中少数载体基本不存在的晶体管的栅极（或源极和漏极）; 并且通过控制其中不存在少数载流子的晶体管的源极和漏极（或栅极）的电位，可以控制其中不存在少数载流子的晶体管的电容。 少数载流子不存在的晶体管可以包括宽带隙半导体。

公开(公告)号：US20110012183A1

公开(公告)日：2011-01-20

申请号：US12893509

申请日：2010-09-29

申请人： Yutaka SHIONOIRI

发明人： Yutaka SHIONOIRI

IPC分类号： H01L27/12 ,  H01L27/06

CPC分类号： H04B5/0012 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07775 ,  G06K19/07779 ,  H01L21/84 ,  H01L23/5223 ,  H01L23/5227 ,  H01L27/12 ,  H01L27/13 ,  H01L29/78612 ,  H01L29/78648 ,  H01L2924/0002 ,  H04B5/0056 ,  H04B5/0081 ,  H01L2924/00

摘要： An ID tag capable of communicating data wirelessly, the size of which is reduced, and where the size of an IC chip is reduced, a limited area of the chip is effectively used, current consumption is reduced, and communication distance is prevented from decreasing. The ID tag of the invention includes an IC chip having an integrated circuit, a resonance capacitor portion and a storage capacitor portion, and an antenna formed over the IC chip so as to overlap at least partially with an insulating film interposed therebetween. The antenna, the insulating film and wirings or semiconductor films forming the integrated circuit are stacked, and one or both of capacitors in the resonance capacitor portion and the storage capacitor portion are formed by this stacked structure.

摘要翻译： 能够无线地传送数据的ID标签，其尺寸减小，IC芯片的尺寸减小，有效地利用了芯片的有限区域，降低了电流消耗，防止了通信距离的下降。 本发明的ID标签包括具有集成电路的IC芯片，谐振电容器部分和存储电容器部分，以及形成在IC芯片上的至少部分地与绝缘膜重叠的天线。 层叠形成集成电路的天线，绝缘膜和布线或半导体膜，并且通过该层叠结构形成谐振电容部和电容保持部的电容器中的一方或两者。

公开(公告)号：US20120025631A1

公开(公告)日：2012-02-02

申请号：US13189862

申请日：2011-07-25

申请人： Yutaka SHIONOIRI ,  Koichiro KAMATA ,  Misako SATO ,  Shuhei MAEDA

发明人： Yutaka SHIONOIRI ,  Koichiro KAMATA ,  Misako SATO ,  Shuhei MAEDA

IPC分类号： H02J17/00

CPC分类号： H02J50/12 ,  H02J7/025 ,  H02J17/00 ,  H02J50/20 ,  H02J50/40 ,  H02J50/80 ,  H02J50/90

摘要： An object is to provide a power feeding system and a power feeding method which are more convenient for a power feeding user at the power receiving end, without causing increases in complexity and size of devices. An object is to provide a power feeding system and a power feeding method which also allow a power feeding provider (a company) which feeds power (at the power transmitting end) to supply power without waste. A power feeding device which wirelessly supplies power to a power receiver detects the position and the resonant frequency of the power receiver by receiving a position and resonant frequency detection signal using a plurality of sub-carriers having different frequencies from the power receiver, and controls the frequency of a power signal to be transmitted to the power receiver on the basis of the information. An efficient power feeding service can be offered by transmitting a power signal to the power receiver at an optimum frequency for high power transmission efficiency.

摘要翻译： 本发明的目的是提供一种供电系统和馈电方法，其对于供电用户在电力接收端更方便，而不会增加设备的复杂性和尺寸。 本发明的目的是提供一种馈电系统和馈电方法，其还允许馈电供应商（在发电端发电）供电而不浪费电力。 向功率接收器无线供电的供电装置通过使用具有与电力接收器不同的频率的多个子载波接收位置和谐振频率检测信号来检测电力接收器的位置和谐振频率，并且控制 根据该信息将电力信号的频率发送到电力接收器。 通过以最佳频率向功率接收器发送功率信号以实现高功率传输效率，可以提供有效的馈电服务。

公开(公告)号：US20110204968A1

公开(公告)日：2011-08-25

申请号：US13026508

申请日：2011-02-14

申请人： Takanori MATSUZAKI ,  Yutaka SHIONOIRI

发明人： Takanori MATSUZAKI ,  Yutaka SHIONOIRI

IPC分类号： H01L25/00

CPC分类号： H03D1/18 ,  H01L27/1225

摘要： An object is to provide a demodulation circuit having a sufficient demodulation ability. Another object is to provide an RFID tag which uses a demodulation circuit having a sufficient demodulation ability. A material which enables a reverse current to be small enough, for example, an oxide semiconductor material, which is a wide bandgap semiconductor, is used in part of a transistor included in a demodulation circuit. By using the semiconductor material which enables a reverse current of a transistor to be small enough, a sufficient demodulation ability can be secured even when an electromagnetic wave having a high amplitude is received.

摘要翻译： 目的在于提供具有足够的解调能力的解调电路。 另一个目的是提供使用具有足够的解调能力的解调电路的RFID标签。 在解调电路中包括的晶体管的一部分中使用能使反向电流足够小的材料，例如，宽带隙半导体的氧化物半导体材料。 通过使用能够使晶体管的反向电流足够小的半导体材料，即使接收到具有高振幅的电磁波也能够确保足够的解调能力。

公开(公告)号：US20120294067A1

公开(公告)日：2012-11-22

申请号：US13472741

申请日：2012-05-16

申请人： Hidetomo KOBAYASHI ,  Yutaka SHIONOIRI ,  Tatsuji NISHIJIMA

发明人： Hidetomo KOBAYASHI ,  Yutaka SHIONOIRI ,  Tatsuji NISHIJIMA

IPC分类号： G06F9/312 ,  G11C11/24

CPC分类号： H01L27/1225 ,  G06F9/3804 ,  G06F9/3814 ,  G11C11/404 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1156 ,  H01L27/1255

摘要： In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion.

摘要翻译： 在利用读取指令的读取部分执行流水线处理的半导体器件和执行根据该指令的操作的算术部分中，当分支预测时，保持在读取部分中的指令从触发器发送到存储器 原来是错的。 注意，算术部分控制包括在读取部分中的触发器和存储器之间的指令的发送和接收。 在分支预测结果为错误的读取部读出的指示是子程序等的情况下，能够消除读取部中的冗余动作。 也就是说，保持在存储器中的指令被发送回到触发器，而不用读取部分重新读取相同的指令，从而可以将该指令输出到算术部分。