Method for preparing lithium manganese spinel oxide having improved electrochemical performance
    3.
    发明授权
    Method for preparing lithium manganese spinel oxide having improved electrochemical performance 有权
    制备具有改善的电化学性能的锂锰尖晶石氧化物的方法

    公开(公告)号:US06929788B2

    公开(公告)日:2005-08-16

    申请号:US09913428

    申请日:2000-12-15

    摘要: The present invention relates to a method for preparing a lithium manganese complex oxide Li1+xMn2−xO4 (0≦x≦0.12) used as a cathode active material of a lithium or lithium ion secondary battery.The present invention provides a method for preparing a manganese compound comprising the step of simultaneously applying a mechanical force and heat energy to a manganese compound to remove defects present in particles of the manganese compound and to control the aggregation of particles and the shape of the aggregated particles, a method for preparing a lithium manganese complex oxide with a spinel structure using the manganese compound prepared by the above method as a raw material, and a lithium or lithium ion secondary battery using the lithium manganese complex oxide with a spinel structure prepared by the above method as a cathode active material.A lithium or lithium ion secondary battery using the lithium manganese complex oxide with a spinel structure prepared from the manganese compound without defects inside particles as a cathode active material has excellent charge/discharge characteristics and cyclic performance.

    摘要翻译: 本发明涉及一种锂锰复合氧化物Li 1 + x 2 O 2-x O 4(0≤x≤0.4)的制备方法, <= 0.12)用作锂或锂离子二次电池的正极活性物质。 本发明提供一种锰化合物的制备方法,包括同时向锰化合物施加机械力和热能以除去锰化合物颗粒中存在的缺陷并控制颗粒的聚集和聚集的形状的步骤 颗粒,使用通过上述方法制备的锰化合物作为原料制备具有尖晶石结构的锂锰复合氧化物的方法,以及使用具有尖晶石结构的锂锰复合氧化物的锂或锂离子二次电池,其由尖晶石结构 作为阴极活性物质。 使用由锰化合物制备的具有尖晶石结构的锂锰复合氧化物的锂或锂离子二次电池在颗粒内没有缺陷作为正极活性材料具有优异的充电/放电特性和循环性能。

    Positive active material for lithium secondary battery and a method of preparing the same
    4.
    发明申请
    Positive active material for lithium secondary battery and a method of preparing the same 审中-公开
    锂二次电池用正极活性物质及其制备方法

    公开(公告)号:US20070122338A1

    公开(公告)日:2007-05-31

    申请号:US11643672

    申请日:2006-12-22

    IPC分类号: C01G45/12 H01M4/50

    摘要: Disclosed is a positive active material for a lithium secondary battery and a preparation method of the same, in particular a positive active material and preparation method of the same that can improve cycle-life characteristics at a high temperature and room temperature, and storage characteristics at a high temperature. The present invention has the effect of providing a positive active material and preparation method of the same that can improve cycle-life characteristics at room temperature and at a high temperature, and storage characteristics at a high temperature, by coating the surface of the lithium manganese spinel oxide particles with a lithium metal complex oxide.

    摘要翻译: 公开了一种用于锂二次电池的正极活性材料及其制备方法,特别是正极活性材料及其制备方法,其可以改善高温和室温下的循环寿命特性,以及储存特性 高温。 本发明的效果是提供一种正极活性物质及其制备方法,其可以通过涂覆锂锰的表面,从而提高室温和高温下的循环寿命特性和高温下的储存特性 具有锂金属复合氧化物的尖晶石氧化物颗粒。

    Method for fabricating an integrated circuit capacitor
    10.
    发明授权
    Method for fabricating an integrated circuit capacitor 有权
    集成电路电容器的制造方法

    公开(公告)号:US06479850B2

    公开(公告)日:2002-11-12

    申请号:US09968884

    申请日:2001-10-03

    申请人: Ki-Young Lee

    发明人: Ki-Young Lee

    IPC分类号: H01L27108

    摘要: A method for fabricating a MIM capacitor of a MDL logic or analog circuit of a semiconductor device. A conductivity layer is formed on a semiconductor substrate having a first inter-level insulating layer. A capping metal layer having an etching rate higher than an oxide layer is formed on the conductivity layer. A lower electrode comprising a “conductivity layer/capping metal layer” deposition is formed by selectively etching the capping metal layer and the conductivity layer in order to expose a predetermined part of the surface of the first inter-level insulating layer. A second inter-level insulating layer is formed on the first inter-level insulating layer covering the lower electrode. A via hole is formed by selectively etching both the second inter-level insulating layer and the lower electrode thereby to expose a portion of the lower electrode so that a tapered capping metal layer remains along the lower edges of the via hole. A dielectric layer, devoid of step coverage defects and concentrated electric fields, is inserted in the via hole between the lower and upper electrodes thereby preventing current leakage and short circuits at portions of the dielectric layer. This has the beneficial effect of substantially improving product yield and reliability.

    摘要翻译: 一种用于制造半导体器件的MDL逻辑或模拟电路的MIM电容器的方法。 在具有第一层间绝缘层的半导体衬底上形成导电层。 在导电层上形成具有高于氧化物层的蚀刻速率的覆盖金属层。 通过选择性地蚀刻封盖金属层和导电层来形成包括“导电层/覆盖金属层”沉积的下电极,以暴露第一层间绝缘层的表面的预定部分。 在覆盖下电极的第一层间绝缘层上形成第二层间绝缘层。 通过选择性地蚀刻第二层间绝缘层和下电极来形成通孔,从而露出下电极的一部分,使得锥形封盖金属层沿着通孔的下边缘保留。 在上下电极之间的通孔中插入没有台阶覆盖缺陷和集中电场的电介质层,从而防止电介质层部分的电流泄漏和短路。 这具有显着提高产品产量和可靠性的有益效果。