-
公开(公告)号：US07726016B2
公开(公告)日：2010-06-01
申请号：US10709752
申请日：2004-05-26
申请人： Kohichi Ohsumi , Kenji Terada , Kohichi Yamazaki
发明人： Kohichi Ohsumi , Kenji Terada , Kohichi Yamazaki
IPC分类号： H01K3/10
CPC分类号： H05K3/427 , H05K3/064 , H05K3/108 , H05K3/4602 , H05K2201/0959 , H05K2203/1394 , Y10T29/49155 , Y10T29/49165
摘要： The present invention provides a method of manufacturing a printed circuit board. The method includes the steps of preparing an insulating substrate having a front surface and a back surface and a layer of metal foil formed on each of the front surface and the back surface; selectively forming a plating layer for forming a land on at least one of the metal foils; adjusting a thickness of the plating layer; and forming the metal foils into lines.
摘要翻译： 本发明提供一种制造印刷电路板的方法。 该方法包括以下步骤：制备具有前表面和后表面的绝缘基板和形成在前表面和后表面中的每一个上的金属箔层; 选择性地形成用于在所述金属箔中的至少一个上形成焊盘的镀层; 调整镀层的厚度; 并将金属箔形成线。
-
公开(公告)号：US07834277B2
公开(公告)日：2010-11-16
申请号：US11862545
申请日：2007-09-27
申请人： Kohichi Ohsumi , Kenji Terada , Kohichi Yamazaki
发明人： Kohichi Ohsumi , Kenji Terada , Kohichi Yamazaki
CPC分类号： H05K3/427 , H05K3/064 , H05K3/108 , H05K3/4602 , H05K2201/0959 , H05K2203/1394 , Y10T29/49155 , Y10T29/49165
摘要： The present invention provides a method of manufacturing printed a circuit board capable of formation of via holes having a low aspect ratio and formation of fine lines, and a printed circuit board manufactured by the method. The method of manufacturing a printed circuit board 10 according to the present invention includes a step of selectively forming a plating layer 16 for lands 22a and 22b on a metal foil 14 on the printed circuit board 10, a step of adjusting the thickness of the plating layer 16, and a step of forming the metal foil 14 into lines 14a. The aspect ratio of via holes 28 formed on lands 22a and 22b can be adjusted by adjusting the thickness of the lands 22a and 22b.
摘要翻译： 本发明提供一种制造能够形成具有低纵横比的通孔和形成细线的印刷电路板的方法，以及通过该方法制造的印刷电路板。 根据本发明的制造印刷电路板10的方法包括在印刷电路板10上的金属箔14上选择性地形成用于焊盘22a和22b的镀层16的步骤，调整镀层厚度的步骤 层16，以及将金属箔14形成为管线14a的步骤。 可以通过调节焊盘22a和22b的厚度来调节形成在焊盘22a和22b上的通孔28的纵横比。
-
公开(公告)号：US20080257597A1
公开(公告)日：2008-10-23
申请号：US11862545
申请日：2007-09-27
申请人： Kohichi Ohsumi , Kenji Terada , Kohichi Yamazaki
发明人： Kohichi Ohsumi , Kenji Terada , Kohichi Yamazaki
IPC分类号： H05K1/11
CPC分类号： H05K3/427 , H05K3/064 , H05K3/108 , H05K3/4602 , H05K2201/0959 , H05K2203/1394 , Y10T29/49155 , Y10T29/49165
摘要： The present invention provides a method of manufacturing printed a circuit board capable of formation of via holes having a low aspect ratio and formation of fine lines, and a printed circuit board manufactured by the method. The method of manufacturing a printed circuit board 10 according to the present invention includes a step of selectively forming a plating layer 16 for lands 22a and 22b on a metal foil 14 on the printed circuit board 10, a step of adjusting the thickness of the plating layer 16, and a step of forming the metal foil 14 into lines 14a. The aspect ratio of via holes 28 formed on lands 22a and 22b can be adjusted by adjusting the thickness of the lands 22a and 22b.
摘要翻译： 本发明提供一种制造能够形成具有低纵横比的通孔和形成细线的印刷电路板的方法，以及通过该方法制造的印刷电路板。 根据本发明的制造印刷电路板10的方法包括在印刷电路板10上的金属箔14上选择性地形成用于焊盘22a和22b的镀层16的步骤， 镀层16，以及将金属箔14形成为管线14a的步骤。 可以通过调整焊盘22a和22b的厚度来调节形成在焊盘22a和22b上的通孔28的纵横比。
-
公开(公告)号：US08304663B2
公开(公告)日：2012-11-06
申请号：US12155151
申请日：2008-05-30
申请人： Kohichi Ohsumi
发明人： Kohichi Ohsumi
IPC分类号： H05K1/16
CPC分类号： H05K3/3452 , H01L23/49816 , H01L23/49838 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H05K3/28 , H05K2201/0195 , H05K2201/09881 , H05K2201/10674 , H05K2203/0588 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： In a wiring board, insulation layers and wiring conductors are alternately laminated, and a plurality of strip-shaped wiring conductors for connecting semiconductor elements are arranged side by side on the outermost insulation layer. Each of the wiring conductors partly has a connection pad to which the electrode terminals of the semiconductor elements are connected by flip-chip bonding. In the wiring board, a solder resist layer is deposited over the outermost insulation layer and the strip-shaped wiring conductors so as to have slit-shaped openings for exposing the upper surfaces of the connection pads. The solder resist layer fills up the space between the connection pads adjacent to each other and exposed within the slit-shaped openings.
摘要翻译： 在布线基板中，绝缘层和布线导体交替层叠，并且多个用于连接半导体元件的条状布线导体并排设置在最外层绝缘层上。 每个布线导体部分地具有连接焊盘，半导体元件的电极端子通过倒装芯片接合连接到该连接焊盘。 在布线板中，在绝缘层和带状布线导体上沉积防焊层，以具有用于暴露连接焊盘上表面的狭缝形开口。 阻焊层填充彼此相邻并在狭缝状开口内露出的连接焊盘之间的空间。
-
公开(公告)号：US20070124929A1
公开(公告)日：2007-06-07
申请号：US10595127
申请日：2004-08-19
申请人： Kohichi Ohsumi , Kaoru Kobayashi
发明人： Kohichi Ohsumi , Kaoru Kobayashi
CPC分类号： H05K3/426 , H05K3/0094 , H05K3/108 , H05K3/427 , H05K3/4602 , H05K2201/0347 , H05K2201/0959 , H05K2201/096 , H05K2203/1461 , Y10T29/49155 , Y10T29/49165
摘要： A printed wiring board having a through hole conductor formed on the surface of a through hole formed in a copper-clad laminate board, and on the surface of the copper-clad laminate board 1 in the vicinity of an opening of the through hole. The through hole conductor is filled with a positive photosensitive resin. A capped conductor is formed on the positive photosensitive resin and is coupled to the through hole conductor. Further, a circuit pattern is formed on the surface of the copper-clad laminate board. An insulating layer is formed on the surface of the copper-clad laminate board, capped conductor, and the circuit pattern, and formed with a via hole extending from the surface of the insulating layer to the capped conductor. A via conductor is formed inside the via hole and on the surface of the insulating layer in the vicinity of an opening of the via hole.
摘要翻译： 一种印刷电路板，具有形成在覆铜层压板上形成的通孔的表面上的通孔导体，以及覆铜层压板1的通孔附近的表面。 通孔导体填充有正性感光性树脂。 在正性感光性树脂上形成有帽状导体，并与通孔导体连接。 此外，在覆铜层压板的表面上形成电路图案。 在覆铜层压板，封盖导体和电路图案的表面上形成绝缘层，并且形成有从绝缘层的表面延伸到封盖导体的通孔。 通孔导体形成在通孔内部以及在通孔的开口附近的绝缘层的表面上。
-
公开(公告)号：US08578601B2
公开(公告)日：2013-11-12
申请号：US13400809
申请日：2012-02-21
IPC分类号： H01K3/10
CPC分类号： H05K3/426 , H05K3/427 , H05K2201/0347 , H05K2201/09563
摘要： A method of manufacturing a printed circuit board includes forming a through hole 2 in an insulating layer 1 having upper and lower faces so as to penetrate between the upper and lower surfaces; allowing a first plated conductor 4 to be deposited at least in the through hole 2 and on the upper and lower surfaces around the through hole; removing the first plated conductor overlying and underlying a periphery of the through hole by etching the first plated conductor 4, while leaving at least the first plated conductor 4 in a mid-portion in a vertical direction within the through hole 2; and forming by semi-additive method a second plated conductor 6 that fills an outer portion than the first plated conductor 4 in the through hole 2, and forms a wiring conductor on the upper and lower surfaces.
摘要翻译： 一种制造印刷电路板的方法包括在具有上表面和下表面的绝缘层1中形成通孔2，以穿透上下表面; 允许第一镀覆导体4至少沉积在通孔2中以及围绕通孔的上表面和下表面上; 通过蚀刻第一镀覆导体4，使至少第一镀覆导体4至少在通孔2中的垂直方向的中间部分中去除覆盖在通孔周围的第一镀覆导体; 并且通过半添加法形成在通孔2中填充比第一镀覆导体4的外部的第二镀覆导体6，并且在上表面和下表面上形成布线导体。
-
公开(公告)号：US07540082B2
公开(公告)日：2009-06-02
申请号：US10595127
申请日：2004-08-19
申请人： Kohichi Ohsumi , Kaoru Kobayashi
发明人： Kohichi Ohsumi , Kaoru Kobayashi
CPC分类号： H05K3/426 , H05K3/0094 , H05K3/108 , H05K3/427 , H05K3/4602 , H05K2201/0347 , H05K2201/0959 , H05K2201/096 , H05K2203/1461 , Y10T29/49155 , Y10T29/49165
摘要： A printed wiring board having a through hole conductor formed on the surface of a through hole formed in a copper-clad laminate board, and on the surface of the copper-clad laminate board 1 in the vicinity of an opening of the through hole. The through hole conductor is filled with a positive photosensitive resin. A capped conductor is formed on the positive photosensitive resin and is coupled to the through hole conductor. Further, a circuit pattern is formed on the surface of the copper-clad laminate board. An insulating layer is formed on the surface of the copper-clad laminate board, capped conductor, and the circuit pattern, and formed with a via hole extending from the surface of the insulating layer to the capped conductor. A via conductor is formed inside the via hole and on the surface of the insulating layer in the vicinity of an opening of the via hole.
摘要翻译： 一种印刷电路板，具有形成在覆铜层压板上形成的通孔的表面上的通孔导体，以及覆铜层压板1的通孔附近的表面。 通孔导体填充有正性感光性树脂。 在正性感光性树脂上形成有帽状导体，并与通孔导体连接。 此外，在覆铜层压板的表面上形成电路图案。 在覆铜层压板，封盖导体和电路图案的表面上形成绝缘层，并且形成有从绝缘层的表面延伸到封盖导体的通孔。 通孔导体形成在通孔内部以及在通孔的开口附近的绝缘层的表面上。
-
公开(公告)号：US20080302563A1
公开(公告)日：2008-12-11
申请号：US12155151
申请日：2008-05-30
申请人： Kohichi Ohsumi
发明人： Kohichi Ohsumi
CPC分类号： H05K3/3452 , H01L23/49816 , H01L23/49838 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H05K3/28 , H05K2201/0195 , H05K2201/09881 , H05K2201/10674 , H05K2203/0588 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： In a wiring board, insulation layers and wiring conductors are alternately laminated, and a plurality of strip-shaped wiring conductors for connecting semiconductor elements are arranged side by side on the outermost insulation layer. Each of the wiring conductors partly has a connection pad to which the electrode terminals of the semiconductor elements are connected by flip-chip bonding. In the wiring board, a solder resist layer is deposited over the outermost insulation layer and the strip-shaped wiring conductors so as to have slit-shaped openings for exposing the upper surfaces of the connection pads. The solder resist layer fills up the space between the connection pads adjacent to each other and exposed within the slit-shaped openings.
摘要翻译： 在布线基板中，绝缘层和布线导体交替层叠，并且多个用于连接半导体元件的条状布线导体并排设置在最外层绝缘层上。 每个布线导体部分地具有连接焊盘，半导体元件的电极端子通过倒装芯片接合连接到该连接焊盘。 在布线板中，在绝缘层和带状布线导体上沉积防焊层，以具有用于暴露连接焊盘上表面的狭缝形开口。 阻焊层填充彼此相邻并在狭缝状开口内露出的连接焊盘之间的空间。
-
公开(公告)号：US08319115B2
公开(公告)日：2012-11-27
申请号：US12562956
申请日：2009-09-18
申请人： Kohichi Ohsumi
发明人： Kohichi Ohsumi
IPC分类号： H05K1/16
CPC分类号： H05K3/3452 , H01L23/49811 , H01L23/49838 , H01L2224/16225 , H01L2224/73204 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H05K3/0044 , H05K3/243 , H05K2201/094 , H05K2201/09736 , H05K2201/09881 , H05K2201/099 , H05K2201/10734 , H05K2203/025 , H05K2203/0574
摘要： A wiring board includes a plurality of circular semiconductor element connection pads deposited in a lattice form onto a mounting portion of an insulation substrate, their upper surfaces being connected to electrodes of a semiconductor element. A solder resist layer is deposited onto the insulation substrate, which covers the side surfaces of these pads and exposes the upper surfaces of these pads. The solder resist layer has a concave part whose bottom surface corresponds to at least all the upper surfaces of these pads.
摘要翻译： 布线板包括以栅格形式沉积到绝缘基板的安装部分上的多个圆形半导体元件连接焊盘，其上表面连接到半导体元件的电极。 将阻焊层沉积在绝缘基板上，该绝缘基板覆盖这些焊盘的侧表面并暴露这些焊盘的上表面。 阻焊层具有凹部，其底表面至少对应于这些焊盘的所有上表面。
-
-
-
-
-
-
-
-
搜索结果
9 条记录 (耗时 0.022 秒)
