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42 条记录 (耗时 0.032 秒)

    High Electron Mobility Transistors with Multiple Channels
    1.
    发明申请
    High Electron Mobility Transistors with Multiple Channels 有权
    具有多个通道的高电子迁移率晶体管

    公开(公告)号：US20130141156A1

    公开(公告)日：2013-06-06

    申请号：US13567749

    申请日：2012-08-06

    申请人： Koon Hoo Teo ,  Peijie Feng ,  Chunjie Duan ,  Toshiyuki Oishi ,  Nakayama Masatoshi

    发明人： Koon Hoo Teo ,  Peijie Feng ,  Chunjie Duan ,  Toshiyuki Oishi ,  Nakayama Masatoshi

    IPC分类号： H01L29/778 ,  G05F1/00

    CPC分类号： H01L29/7783 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A device includes a source for transmitting an electronic charge through a conduction path; a drain for receiving the electronic charge; a stack for providing at least part of the conduction path; and a gate operatively connected to the stack for controlling a conduction of the electronic charge. The stack includes an insulator layer, an N-polar layer and a barrier layer selected such that, during an operation of the device, the conduction path formed in the N-polar layer includes a two-dimensional electron gas (2DEG) channel and an inversion carrier channel.

    摘要翻译： 一种装置包括用于通过导电路径发送电荷的源; 用于接收电子费用的排水口; 用于提供所述传导路径的至少一部分的堆叠; 以及可操作地连接到所述堆叠的门，用于控制所述电子电荷的导通。 该堆叠包括绝缘体层，N极层和阻挡层，其被选择为使得在器件的操作期间，形成在N极层中的导电路径包括二维电子气（2DEG）通道和 反向载波信道。

    High electron mobility transistors with multiple channels
    2.
    发明授权
    High electron mobility transistors with multiple channels 有权
    具有多个通道的高电子迁移率晶体管

    公开(公告)号：US08624667B2

    公开(公告)日：2014-01-07

    申请号：US13567749

    申请日：2012-08-06

    申请人： Koon Hoo Teo ,  Peijie Feng ,  Chunjie Duan ,  Toshiyuki Oishi ,  Nakayama Masatoshi

    发明人： Koon Hoo Teo ,  Peijie Feng ,  Chunjie Duan ,  Toshiyuki Oishi ,  Nakayama Masatoshi

    IPC分类号： H01L25/00

    CPC分类号： H01L29/7783 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A device includes a source for transmitting an electronic charge through a conduction path; a drain for receiving the electronic charge; a stack for providing at least part of the conduction path; and a gate operatively connected to the stack for controlling a conduction of the electronic charge. The stack includes an insulator layer, an N-polar layer and a barrier layer selected such that, during an operation of the device, the conduction path formed in the N-polar layer includes a two-dimensional electron gas (2DEG) channel and an inversion carrier channel.

    摘要翻译： 一种装置包括用于通过导电路径发送电荷的源; 用于接收电子费用的排水口; 用于提供所述传导路径的至少一部分的堆叠; 以及可操作地连接到所述堆叠的门，用于控制所述电子电荷的导通。 该堆叠包括绝缘体层，N极层和阻挡层，其被选择为使得在器件的操作期间，形成在N极层中的导电路径包括二维电子气（2DEG）通道和 反向载波信道。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    5.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20090142871A1

    公开(公告)日：2009-06-04

    申请号：US12323634

    申请日：2008-11-26

    申请人： Kenichi Ohtsuka ,  Yoichiro Tarui ,  Yosuke Suzuki ,  Katsuomi Shiozawa ,  Kyozo Kanamoto ,  Toshiyuki Oishi ,  Yasunori Tokuda ,  Tatsuo Omori

    发明人： Kenichi Ohtsuka ,  Yoichiro Tarui ,  Yosuke Suzuki ,  Katsuomi Shiozawa ,  Kyozo Kanamoto ,  Toshiyuki Oishi ,  Yasunori Tokuda ,  Tatsuo Omori

    IPC分类号： H01L21/20 ,  H01L33/00

    CPC分类号： H01S5/34333 ,  B82Y20/00 ,  H01L33/325 ,  H01L33/40 ,  H01S5/0421 ,  H01S5/0425 ,  H01S5/22 ,  H01S5/2214 ,  H01S5/3063

    摘要： A method of manufacturing a semiconductor device provides a semiconductor device with a gallium-nitride-based semiconductor structure that allows long-term stable operation without degradation in device performance. After formation of an insulation film on a surface other than on a ridge surface, an oxygen-containing gas such as O2, O3, NO, N2O, or NO2 is supplied to oxidize a p-type GaN contact layer from the surface and to thereby form an oxide film on the surface of the p-type GaN contact layer. Then, a p-type electrode that establishes contact with the p-type GaN contact layer is formed by evaporation or sputtering on the oxide film and on the insulation film. Heat treatment is subsequently performed at temperatures between 400 and 700° C. in an atmosphere containing a nitrogen-containing gas such as N2 or NH3 or an inert gas such as Ar or He.

    摘要翻译： 半导体器件的制造方法为半导体器件提供了氮化镓基半导体结构，其允许长期稳定的操作而不会降低器件性能。 在表面以外的表面上形成绝缘膜之后，供给诸如O 2，O 3，NO，N 2 O或NO 2的含氧气体以从表面氧化p型GaN接触层，由此 在p型GaN接触层的表面上形成氧化膜。 然后，通过在氧化物膜和绝缘膜上的蒸发或溅射形成与p型GaN接触层建立接触的p型电极。 随后在含有含氮气体如N 2或NH 3或惰性气体例如Ar或He的气氛中，在400-700℃的温度下进行热处理。

    Semiconductor device
    6.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US06600195B1

    公开(公告)日：2003-07-29

    申请号：US09637870

    申请日：2000-08-15

    申请人： Yukio Nishida ,  Hirokazu Sayama ,  Hidekazu Oda ,  Toshiyuki Oishi

    发明人： Yukio Nishida ,  Hirokazu Sayama ,  Hidekazu Oda ,  Toshiyuki Oishi

    IPC分类号： H01L2976

    CPC分类号： H01L29/66583 ,  H01L21/26586 ,  H01L21/823412 ,  H01L21/823456 ,  H01L29/66492 ,  H01L29/66537 ,  H01L29/7833

    摘要： A semiconductor device capable of preventing variations in threshold voltage and having high reliability is provided. The semiconductor device includes a semiconductor substrate having a semiconductor region, and a field-effect transistor. The field-effect transistor includes a gate electrode, source and drain regions, and a channel region. The channel region includes a pair of lightly doped impurity regions having a relatively low impurity concentration as well as a heavily doped impurity region located between the lightly doped impurity regions and having a relatively high impurity concentration.

    摘要翻译： 提供能够防止阈值电压变化并具有高可靠性的半导体器件。 半导体器件包括具有半导体区域的半导体衬底和场效应晶体管。 场效应晶体管包括栅电极，源极和漏极区以及沟道区。 沟道区包括杂质浓度相对较低的一对轻掺杂杂质区，以及位于轻掺杂杂质区之间并具有较高杂质浓度的重掺杂杂质区。

    Nitride semiconductor device and method of manufacturing the same
    8.
    发明授权
    Nitride semiconductor device and method of manufacturing the same 有权
    氮化物半导体器件及其制造方法

    公开(公告)号：US07842962B2

    公开(公告)日：2010-11-30

    申请号：US11274422

    申请日：2005-11-16

    申请人： Katsuomi Shiozawa ,  Toshiyuki Oishi ,  Kazushige Kawasaki ,  Yuji Abe

    发明人： Katsuomi Shiozawa ,  Toshiyuki Oishi ,  Kazushige Kawasaki ,  Yuji Abe

    IPC分类号： H01L33/00

    CPC分类号： H01L21/28575 ,  H01L33/32 ,  H01L33/40

    摘要： A P-type electrode material is provided on a top surface of a P-type contact layer. The P-type electrode material is formed with an AuGa film, an Au film, a Pt film, and an Au film. The AuGa film is provided on the P-type contact layer. The Au film is provided on the AuGa film. The Pt film is provided on the Au film. The Au film is provided on the Pt film. With this, a nitride semiconductor device having a P-type electrode which can decrease a contact resistance between a P-type contact layer and the P-type electrode is obtained.

    摘要翻译： P型电极材料设置在P型接触层的顶表面上。 P型电极材料由AuGa膜，Au膜，Pt膜和Au膜形成。 AuGa膜设置在P型接触层上。 Au膜设置在AuGa膜上。 Pt膜设置在Au膜上。 Au膜设置在Pt膜上。 由此，可以获得具有能够降低P型接触层与P型电极之间的接触电阻的P型电极的氮化物半导体器件。