公开(公告)号：US08569156B1

公开(公告)日：2013-10-29

申请号：US13473403

申请日：2012-05-16

申请人： Lance Scudder ,  Pushkar Ranade ,  Charles Stager ,  Urupattur C. Sridharan ,  Dalong Zhao

发明人： Lance Scudder ,  Pushkar Ranade ,  Charles Stager ,  Urupattur C. Sridharan ,  Dalong Zhao

IPC分类号： H01L21/425 ,  H01L21/336 ,  H01L21/36 ,  H01L21/20

CPC分类号： H01L21/823892 ,  H01L21/02694 ,  H01L21/046 ,  H01L21/26506 ,  H01L21/8213 ,  H01L21/823878 ,  H01L27/0921 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/66068 ,  H01L29/66537 ,  H01L29/6659 ,  H01L29/66651 ,  H01L29/7833

摘要： A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.

公开(公告)号：US08999861B1

公开(公告)日：2015-04-07

申请号：US13469249

申请日：2012-05-11

申请人： Lance Scudder ,  Pushkar Ranade ,  Charles Stager ,  Lucian Shifren ,  Dalong Zhao ,  U.C. Sridharan ,  Michael Duane

发明人： Lance Scudder ,  Pushkar Ranade ,  Charles Stager ,  Lucian Shifren ,  Dalong Zhao ,  U.C. Sridharan ,  Michael Duane

IPC分类号： H01L29/78 ,  H01L21/02

CPC分类号： H01L21/02205 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/761 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823892 ,  H01L29/105 ,  H01L29/6659

摘要： A method for fabricating a semiconductor structure so as to have reduced junction leakage is disclosed. The method includes providing substitutional boron in a semiconductor substrate. The method includes preparing the substrate using a pre-amorphization implant and a carbon implant followed by a recrystallization step and a separate defect repair/activation step. Boron is introduced to the pre-amorphized region preferably by ion implantation.

摘要翻译： 公开了一种用于制造半导体结构以减少结漏电的方法。 该方法包括在半导体衬底中提供取代的硼。 该方法包括使用预非晶化植入物和碳注入制备底物，接着进行重结晶步骤和单独的缺陷修复/活化步骤。 优选通过离子注入将硼引入到非晶化区域中。

公开(公告)号：US08796048B1

公开(公告)日：2014-08-05

申请号：US13469598

申请日：2012-05-11

申请人： Scott E. Thompson ,  Pushkar Ranade ,  Lance Scudder ,  Charles Stager

发明人： Scott E. Thompson ,  Pushkar Ranade ,  Lance Scudder ,  Charles Stager

IPC分类号： H01L21/66 ,  H01L21/67 ,  H01L21/762

CPC分类号： H01L21/67253 ,  H01L21/76229 ,  H01L22/12 ,  H01L22/30

摘要： The present disclosure provides methods and structures for measurement, control, and monitoring the thickness of thin film layers formed as part of a semiconductor manufacturing process. The methods and structures presented provide the capability to measure and monitor the thickness of the thin film using trench line structures. In certain embodiments, the thin film thickness measurement system can be integrated with thin film growth and control software, providing automated process control (APC) or statistical process control (SPC) capability by measuring and monitoring the thin film thickness during manufacturing. Methods for measuring the thickness of thin films can be important to the fabrication of integrated circuits because the thickness and uniformity of the thin film can determine electrical characteristics of the transistors being fabricated.

摘要翻译： 本公开提供了用于测量，控制和监测作为半导体制造工艺的一部分形成的薄膜层的厚度的方法和结构。 所提出的方法和结构提供了使用沟槽结构测量和监测薄膜的厚度的能力。 在某些实施例中，薄膜厚度测量系统可以与薄膜生长和控制软件集成，通过在制造期间测量和监测薄膜厚度来提供自动化过程控制（APC）或统计过程控制（SPC）能力。 用于测量薄膜厚度的方法对于集成电路的制造而言是重要的，因为薄膜的厚度和均匀性可以确定正在制造的晶体管的电特性。

公开(公告)号：US07842616B2

公开(公告)日：2010-11-30

申请号：US11625585

申请日：2007-01-22

申请人： Shuji Ikeda ,  Jeff Wetzel ,  James Beach ,  Charles Stager ,  Michael Gotskowski ,  Andrew Collin Campbell

发明人： Shuji Ikeda ,  Jeff Wetzel ,  James Beach ,  Charles Stager ,  Michael Gotskowski ,  Andrew Collin Campbell

IPC分类号： H01L21/00

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/28123 ,  H01L21/3086 ,  H01L21/3088 ,  H01L29/1037 ,  H01L29/78

摘要： Methods for fabricating semiconductor structures are provided. A first layer may be deposited onto a substrate followed by the deposition of a second layer onto the first layer. A plurality of line structures may be etched in the second layer. A third layer, deposited onto the plurality of line structures of the second layer, may subsequently be etched to expose the plurality of line structures in the second layer. The plurality of line structures in the second layer may be removed, leaving an etched third layer. The etched third layer may be used as a mask to etch the first layer to form a semiconductor structure in the first layer. In some respects, the methods may include steps for etching the substrate using the etched first layer. The methods may also provide annealing the etched substrate to form a corrugate substrate surface.

摘要翻译： 提供制造半导体结构的方法。 可以将第一层沉积在基底上，随后将第二层沉积到第一层上。 可以在第二层中蚀刻多个线结构。 沉积在第二层的多个线结构上的第三层可随后被蚀刻以露出第二层中的多个线结构。 可以去除第二层中的多个线结构，留下蚀刻的第三层。 蚀刻的第三层可以用作掩模以蚀刻第一层以在第一层中形成半导体结构。 在某些方面，该方法可以包括使用蚀刻的第一层蚀刻衬底的步骤。 该方法还可以提供对蚀刻的衬底进行退火以形成波纹衬底表面。

公开(公告)号：US20080176406A1

公开(公告)日：2008-07-24

申请号：US11625585

申请日：2007-01-22

申请人： Shuji Ikeda ,  Jeff Wetzel ,  James Beach ,  Charles Stager ,  Michael Gotskowski ,  Andrew Collin Campbell

发明人： Shuji Ikeda ,  Jeff Wetzel ,  James Beach ,  Charles Stager ,  Michael Gotskowski ,  Andrew Collin Campbell

IPC分类号： H01L21/311

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/28123 ,  H01L21/3086 ,  H01L21/3088 ,  H01L29/1037 ,  H01L29/78

摘要： Methods for fabricating semiconductor structures are provided. A first layer may be deposited onto a substrate followed by the deposition of a second layer onto the first layer. A plurality of line structures may be etched in the second layer. A third layer, deposited onto the plurality of line structures of the second layer, may subsequently be etched to expose the plurality of line structures in the second layer. The plurality of line structures in the second layer may be removed, leaving an etched third layer. The etched third layer may be used as a mask to etch the first layer to form a semiconductor structure in the first layer. In some respects, the methods may include steps for etching the substrate using the etched first layer. The methods may also provide annealing the etched substrate to form a corrugate substrate surface.

摘要翻译： 提供制造半导体结构的方法。 可以将第一层沉积在基底上，随后将第二层沉积到第一层上。 可以在第二层中蚀刻多个线结构。 沉积在第二层的多个线结构上的第三层可随后被蚀刻以露出第二层中的多个线结构。 可以去除第二层中的多个线结构，留下蚀刻的第三层。 蚀刻的第三层可以用作掩模以蚀刻第一层以在第一层中形成半导体结构。 在某些方面，该方法可以包括使用蚀刻的第一层蚀刻衬底的步骤。 该方法还可以提供对蚀刻的衬底进行退火以形成波纹衬底表面。