公开(公告)号：US07120048B2

公开(公告)日：2006-10-10

申请号：US10874132

申请日：2004-06-21

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: G11C11/00

CPC classification number: G11C11/155

Abstract: A magnetoresistive memory cell and array are provided for nonvolatile storage of binary information. According to an embodiment, a memory cell has a ring-shaped magnetoresistive multilayer element (or bit). A plurality of vias pass through a center hole in the ring-shaped element. Each end of each via is coupled with a separate write-read line segment that extends radially from the center hole past a perimeter of the ring-shaped element. The write-read lines are configured to generate magnetic fields for switching a magnetization direction of one or more layers of the ring-shaped bits in the array.

Abstract translation: 提供磁阻存储单元和阵列用于二进制信息的非易失性存储。 根据实施例，存储单元具有环形磁阻多层元件（或位）。 多个通孔穿过环形元件中的中心孔。 每个通孔的每个端部与从中心孔径向延伸穿过环形元件的周边的单独的写入读取线段耦合。 写入读取线被配置为产生用于切换阵列中的一个或多个环形位的层的磁化方向的磁场。

公开(公告)号：US20060281364A1

公开(公告)日：2006-12-14

申请号：US11152651

申请日：2005-06-14

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: H01R11/00

CPC classification number: H01R13/22 ,  H01R2201/20

Abstract: Methods and systems are provided for testing circuits having electronic devices. In one embodiment, an electronic device test adapter comprises a base interface section, at least one test interface section, and at least one flexible section. The base interface section includes a device side attach pad interface and a printed wiring assembly side attach pad interface. The base interface section is adapted to mount onto a printed wiring assembly device. The device side attach pad interface and the printed wiring assembly side attach pad interface are adapted to communicate one or more signals between the electronic device and the printed wiring assembly device. The at least one test interface section includes a testing interface, wherein the base interface section, the at least one flexible section, and the at least one test interface section are adapted to communicate the one or more signals communicated between the electronic device and the printed wiring assembly device to the testing interface.

Abstract translation: 提供了用于具有电子设备的测试电路的方法和系统。 在一个实施例中，电子设备测试适配器包括基本接口部分，至少一个测试接口部分和至少一个柔性部分。 基本接口部分包括器件侧附接焊盘接口和印刷线路组件侧附接接口接口。 基座接口部分适于安装在印刷线路组件装置上。 设备侧附接垫接口和印刷线路组件侧附接垫接口适于在电子设备和印刷线路组装设备之间传送一个或多个信号。 所述至少一个测试接口部分包括测试接口，其中所述基本接口部分，所述至少一个柔性部分以及所述至少一个测试接口部分适于传达在所述电子设备和所述打印机之间传送的所述一个或多个信号 接线装配设备到测试界面。

公开(公告)号：US20070090506A1

公开(公告)日：2007-04-26

申请号：US11254512

申请日：2005-10-20

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: H01L23/02

CPC classification number: H05K3/3436 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06572 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/141 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09627 ,  H05K2201/0979 ,  H05K2201/10378 ,  Y02P70/613 ,  Y10T29/49149

Abstract: In one aspect, the present invention provides interposers that can mechanically, electrically, and thermally interconnect first and second microelectronic components. An interposer in accordance with the present invention includes a substrate, preferably flexible, having first and second oppositely facing surfaces. Such interposers also include an array of links traversing from the first surface of the substrate to the second surface of the substrate. In accordance with the present invention, each link preferably comprises a buried portion positioned between the first and second surfaces of the substrate. In other aspects of the present invention, microelectronic assemblies having first and second microelectronic components interconnected by an interposer and methods of interconnecting such components are provided.

Abstract translation: 一方面，本发明提供可以机械地，电气地和热互连第一和第二微电子部件的插入件。 根据本发明的插入器包括具有第一和第二相对面的表面的优选柔性的衬底。 这种插入件还包括从衬底的第一表面到衬底的第二表面横穿的链节阵列。 根据本发明，每个连杆优选地包括位于基板的第一和第二表面之间的掩埋部分。 在本发明的其它方面，提供了具有通过插入器互连的第一和第二微电子部件的微电子组件以及互连这些部件的方法。

公开(公告)号：US20060261466A1

公开(公告)日：2006-11-23

申请号：US11130744

申请日：2005-05-17

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: H01L23/12

CPC classification number: H01L23/642 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H01L2924/00

Abstract: An integrated circuit package is provided. The package comprises a lid which is adapted to cover an integrated circuit, the lid is further adapted to provide bypass capacitance to the integrated circuit.

Abstract translation: 提供集成电路封装。 封装包括适于覆盖集成电路的盖，盖还适于向集成电路提供旁路电容。

公开(公告)号：US20060215336A1

公开(公告)日：2006-09-28

申请号：US11089184

申请日：2005-03-24

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: H02H9/00

CPC classification number: H05K9/0067 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2224/0401

Abstract: Methods and systems are provided for protecting an electronic device from electrostatic discharge when inserting and removing the electronic device from ESD foam. In one embodiment, an ESD foam ground clip is presented. The clip comprises a low-impedance contact and a ground connector adapted to electrically connect the low-impedance contact to an electrical ground.

Abstract translation: 提供了用于在从ESD泡沫中插入和移除电子设备时，保护电子设备免受静电放电的方法和系统。 在一个实施例中，呈现ESD泡沫接地夹。 该夹具包括低阻抗接点和适于将低阻抗接触电连接到电接地的接地连接器。

公开(公告)号：US20060146459A1

公开(公告)日：2006-07-06

申请号：US11030657

申请日：2005-01-04

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: H02H9/00

CPC classification number: G01R31/2887 ,  G01R1/0425 ,  H01R13/6485 ,  H05K9/0067

Abstract: An ESD protection system for an IC device. An ESD protection circuit is comprised of a plurality of resistors and a common ground bus. The first terminal of each resistor is coupled to an associated pin of an IC device while the second terminal of each resistor is coupled to the common ground bus. The common ground bus is coupled with a reference ground. A clip holds the ESD protection circuit to pins of the IC device. As the IC device is transported, the present invention maintains a continuous controlled DC path to reference ground on every pin of the IC device, thus preventing damaging electrostatic charges from accumulating on the IC device pins, or discharging through the IC device.

Abstract translation: 一种用于IC器件的ESD保护系统。 ESD保护电路由多个电阻器和公共接地总线组成。 每个电阻器的第一端子耦合到IC器件的相关引脚，而每个电阻器的第二端子耦合到公共接地总线。 公共地面总线与参考地面相连。 夹子将ESD保护电路保持在IC器件的引脚上。 当IC器件被传输时，本发明在IC器件的每个引脚上保持连续受控的DC参考地线，从而防止静电电荷累积在IC器件引脚上或者通过IC器件放电。

公开(公告)号：US20060007728A1

公开(公告)日：2006-01-12

申请号：US10874132

申请日：2004-06-21

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: G11C11/00

CPC classification number: G11C11/155

Abstract: A magnetoresistive memory cell and array are provided for nonvolatile storage of binary information. According to an embodiment, a memory cell has a ring-shaped magnetoresistive multilayer element (or bit). A plurality of vias pass through a center hole in the ring-shaped element. Each end of each via is coupled with a separate write-read line segment that extends radially from the center hole past a perimeter of the ring-shaped element. The write-read lines are configured to generate magnetic fields for switching a magnetization direction of one or more layers of the ring-shaped bits in the array.

公开(公告)号：US20070259480A1

公开(公告)日：2007-11-08

申请号：US11381290

申请日：2006-05-02

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: H01L21/00

CPC classification number: H05K3/341 ,  H05K1/141 ,  H05K3/3421 ,  H05K2201/10378 ,  H05K2201/10689 ,  H05K2201/10946 ,  H05K2201/10969 ,  H05K2201/10984 ,  Y02P70/613

Abstract: A method of coupling an integrated circuit (IC) assembly to a printed wiring board (PWB) is provided. The method comprises applying a solder paste to at least one IC assembly interfacial attach pad having a first size on a surface of the IC assembly and applying a solder paste to at least one PWB interfacial attach pad having a second size on a surface of the PWB. The method also comprises reflow attaching the at least one IC assembly interfacial attach pad to the at least one PWB interfacial attach pad, wherein the difference between the size of the at least one PWB interfacial attach pad and the size of the at least one IC assembly interfacial attach pad substantially inhibits self-alignment and lift-off forces.

Abstract translation: 提供了一种将集成电路（IC）组件耦合到印刷电路板（PWB）的方法。 该方法包括将焊膏施加到IC组件的表面上具有第一尺寸的至少一个IC组件界面附接垫，并将焊膏施加到PWB的表面上的至少一个具有第二尺寸的PWB界面连接垫 。 该方法还包括将至少一个IC组装界面附着垫重新焊接到至少一个PWB界面附接垫上，其中至少一个PWB界面附着垫的尺寸与至少一个IC组件的尺寸之间的差异 界面附着垫基本上抑制自对准和剥离力。

公开(公告)号：US20070096857A1

公开(公告)日：2007-05-03

申请号：US11263332

申请日：2005-10-31

Applicant: Winston Webb ,  Erin Penny ,  Lance Sundstrom ,  Robert Shappell

Inventor： Winston Webb ,  Erin Penny ,  Lance Sundstrom ,  Robert Shappell

IPC: H01F5/00

CPC classification number: G01N27/9013

Abstract: An improved Helmholtz coil system is disclosed, which allows testing of components in a uniform DC or AC magnetic field with precise and repeatable positioning and orientation over 360 degrees of angular displacement about each of the x, y and z planes. For example, a 3-gimbaled Helmholtz coil system is disclosed, which includes a base plate that supports two coils arranged on a common axis and perpendicular to the base, and a system of three gimbals arranged in proximity to, but not necessarily located within, the magnetic field between the two coils. The gimbaled system includes an outer mount that is arranged perpendicular to the base plate and substantially intersects the center of the magnetic field. The gimbaled system includes three lockable gimbals, which can rotate on axes at right angles with respect to each other so as to allow a full 360 degrees of angular displacement in the x, y and z planes and also be locked for stabilization at any position therebetween. Thus, a component to be tested is secured to a plate or a test PWA attached to the inner-most or center gimbal, one or more of the three gimbals is moved and locked to position the component at a point associated with a desired set of coordinates in the x, y and z planes, and power is applied to the gimbaled Helmholtz coil system to generate a magnetic field between the two coils. Also, a set of slip rings can be provided with the gimbaled Helmholtz coil system, which enables transmission of test measurement signals from the test component to an external connection of the gimbaled Helmholtz coil system and allows more than 360 degrees of displacement of the component in any of the x, y and z planes.

Abstract translation: 公开了一种改进的亥姆霍兹线圈系统，其允许在均匀的DC或AC磁场中测试组件，其精确且可重复的定位和取向围绕x，y和z平面各自的360度角位移。 例如，公开了一种3平衡的亥姆霍兹线圈系统，其包括支撑布置在公共轴线上并垂直于基座的两个线圈的基板，以及布置在接近但不一定位于其中的三个万向架的系统， 两个线圈之间的磁场。 万向节系统包括垂直于基板布置并基本上与磁场中心相交的外部安装件。 万向节系统包括三个可锁定的万向节，可以在轴线上相对于彼此以直角旋转，以便允许在x，y和z平面中完全360度的角位移，并且还被锁定用于在其间的任何位置处的稳定 。 因此，要测试的部件被固定到附接到最内侧或中心万向节的板或测试PWA，三个万向架中的一个或多个被移动和锁定，以将部件定位在与期望的一组 坐标在x，y和z平面，并且功率被施加到万向亥姆霍兹线圈系统以在两个线圈之间产生磁场。 此外，可以提供一组滑环，其具有万向节亥姆霍兹线圈系统，其能够将测试测量信号从测试部件传输到万向亥姆霍兹线圈系统的外部连接，并允许组件的360度以上的位移 任何x，y和z平面。

公开(公告)号：US20070075390A1

公开(公告)日：2007-04-05

申请号：US11240882

申请日：2005-09-30

Applicant: Lance Sundstrom

Inventor： Lance Sundstrom

IPC: H01L31/00

CPC classification number: H03K19/0033

Abstract: Radiation hardening, detection and protection design methods are disclosed. An example write drive circuit is disclosed having radiation hardened analog circuitry. A passive transistor is provided to generate a radiation photo-current to offset any net radiation photo-current of the operational circuitry. Using this technique, a radiation hardened reference-mirror control circuit provides a switched write current for setting the logical state of MRAM bits during a radiation event, for instance. A radiation detector and radiation hardened logic gates are further provided for inhibiting the write current when a radiation level is above a predetermined level.

Abstract translation: 公开了辐射硬化，检测和保护设计方法。 公开了一种具有辐射硬化模拟电路的示例性写驱动电路。 提供无源晶体管以产生辐射光电流以抵消操作电路的任何净辐射光电流。 使用该技术，辐射硬化的参考镜控制电路例如提供用于在辐射事件期间设置MRAM位的逻辑状态的切换写入电流。 进一步提供辐射检测器和辐射硬化逻辑门，用于当辐射水平高于预定水平时禁止写入电流。