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17 条记录 (耗时 0.026 秒)

    RFID TAG
    4.
    发明申请
    RFID TAG 审中-公开
    RFID标签

    公开(公告)号：US20110147468A1

    公开(公告)日：2011-06-23

    申请号：US12970394

    申请日：2010-12-16

    申请人： Ji Man PARK ,  Lee Mi Do ,  Kyu Ha Baek ,  Kun Sik Park ,  Dong Pyo Kim

    发明人： Ji Man PARK ,  Lee Mi Do ,  Kyu Ha Baek ,  Kun Sik Park ,  Dong Pyo Kim

    IPC分类号： G06K19/073

    CPC分类号： G06K19/0704 ,  G06K19/0723

    摘要： Provided is a radio frequency identification (RFID) tag whose data can be stably read at a long distance on the basis of a passive RFID tag. The RFID tag includes a rechargeable unit charged to a predetermined voltage, and a power source including a direct current (DC) power source including a rectifier for converting an RF signal into DC power and a regulator for supplying a predetermined DC voltage, an interceptor disposed between the rechargeable unit and the DC power source to connecting or disconnecting the power to the rechargeable unit, and an overvoltage preventor connected to an output terminal of the DC power source in parallel.

    摘要翻译： 提供了一种射频识别（RFID）标签，其数据可以在无源RFID标签的基础上以长距离稳定地读取。 RFID标签包括充电到预定电压的可充电单元和包括直流（DC）电源的电源，该直流电源包括用于将RF信号转换成直流电力的整流器和用于提供预定DC电压的调节器，设置的拦截器 在可再充电单元和直流电源之间，连接或断开与可再充电单元的电力，以及并联连接到DC电源的输出端子的过电压防止器。

    CMOS-BASED PLANAR TYPE SILICON AVALANCHE PHOTO DIODE USING SILICON EPITAXIAL LAYER AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    CMOS-BASED PLANAR TYPE SILICON AVALANCHE PHOTO DIODE USING SILICON EPITAXIAL LAYER AND METHOD OF MANUFACTURING THE SAME 有权
    使用硅外延层的基于CMOS的平面型硅氧化物照相二极管及其制造方法

    公开(公告)号：US20090146238A1

    公开(公告)日：2009-06-11

    申请号：US12195166

    申请日：2008-08-20

    申请人： Yong Sun Yoon ,  Kun Sik Park ,  Jong Moon Park ,  Bo Woo Kim ,  Jin Yeong Kang

    发明人： Yong Sun Yoon ,  Kun Sik Park ,  Jong Moon Park ,  Bo Woo Kim ,  Jin Yeong Kang

    IPC分类号： H01L31/103 ,  H01L31/18

    CPC分类号： H01L31/107

    摘要： A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes are formed.

    摘要翻译： 使用硅外延层的基于互补金属氧化物半导体（CMOS）的平面型雪崩光电二极管（APD）和制造该APD的方法，所述光电二极管包括：衬底; 在衬底中形成的第一导电类型的阱层; 通过低能离子注入形成在第一导电类型的阱层中的雪崩嵌入结; 形成在雪崩嵌入结的硅外延层; 由所述第一导电类型的阱层的表面的一部分形成在所述雪崩嵌入结中并形成p-n结的与所述第一导电类型相反的第二导电类型的掺杂区域; 分别形成在第二导电类型的掺杂区域上的正极和负极以及从第二导电类型的掺杂区域分离的第一导电类型的阱层; 以及形成在除了形成正极和负极的窗口之外的整个表面上的氧化物层。

    CMOS-based planar type silicon avalanche photo diode using silicon epitaxial layer and method of manufacturing the same
    8.
    发明授权
    CMOS-based planar type silicon avalanche photo diode using silicon epitaxial layer and method of manufacturing the same 有权
    使用硅外延层的CMOS基平面型硅雪崩光电二极管及其制造方法

    公开(公告)号：US07994553B2

    公开(公告)日：2011-08-09

    申请号：US12195166

    申请日：2008-08-20

    申请人： Yong Sun Yoon ,  Kun Sik Park ,  Jong Moon Park ,  Bo Woo Kim ,  Jin Yeong Kang

    发明人： Yong Sun Yoon ,  Kun Sik Park ,  Jong Moon Park ,  Bo Woo Kim ,  Jin Yeong Kang

    IPC分类号： H01L31/062

    CPC分类号： H01L31/107

    摘要： A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes are formed.

    摘要翻译： 使用硅外延层的基于互补金属氧化物半导体（CMOS）的平面型雪崩光电二极管（APD）和制造该APD的方法，所述光电二极管包括：衬底; 在衬底中形成的第一导电类型的阱层; 通过低能离子注入形成在第一导电类型的阱层中的雪崩嵌入结; 形成在雪崩嵌入结的硅外延层; 由所述第一导电类型的阱层的表面的一部分形成在所述雪崩嵌入结中并形成p-n结的与所述第一导电类型相反的第二导电类型的掺杂区域; 分别形成在第二导电类型的掺杂区域上的正极和负极以及从第二导电类型的掺杂区域分离的第一导电类型的阱层; 以及形成在除了形成正极和负极的窗口之外的整个表面上的氧化物层。

    Bipolar junction transistor-based uncooled infrared sensor and manufacturing method thereof
    9.
    发明授权
    Bipolar junction transistor-based uncooled infrared sensor and manufacturing method thereof 有权
    双极结晶体管型非制冷红外传感器及其制造方法

    公开(公告)号：US07855366B2

    公开(公告)日：2010-12-21

    申请号：US12111830

    申请日：2008-04-29

    申请人： Kun Sik Park ,  Yong Sun Yoon ,  Bo Woo Kim ,  Jin Yeong Kang ,  Jong Moon Park ,  Seong Wook Yoo

    发明人： Kun Sik Park ,  Yong Sun Yoon ,  Bo Woo Kim ,  Jin Yeong Kang ,  Jong Moon Park ,  Seong Wook Yoo

    IPC分类号： G01J5/20

    CPC分类号： G01J5/20 ,  H01L21/762 ,  H01L27/1203

    摘要： A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.

    摘要翻译： 提供了一种基于BJT（双极结型晶体管）的非制冷IR传感器及其制造方法。 基于BJT的非制冷红外传感器包括：基板; 至少一个BJT，其形成为与衬底分开浮动; 以及形成在所述至少一个BJT的上表面上的吸热层，其中所述BJT根据通过所述吸热层吸收的热量来改变输出值。 因此，可以提供能够通过CMOS兼容工艺实现的BJT系非冷却IR传感器，并获得更优异的温度变化检测特性。

    Exposure apparatus
    10.
    发明申请
    Exposure apparatus 有权
    曝光装置

    公开(公告)号：US20060109444A1

    公开(公告)日：2006-05-25

    申请号：US11249783

    申请日：2005-10-13

    申请人： Sang Gi Kim ,  Ju Wook Lee ,  Jong Moon Park ,  Seong Wook Yoo ,  Kun Sik Park ,  Yong Sun Yoon ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Boo Woo Kim

    发明人： Sang Gi Kim ,  Ju Wook Lee ,  Jong Moon Park ,  Seong Wook Yoo ,  Kun Sik Park ,  Yong Sun Yoon ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Boo Woo Kim

    IPC分类号： G03B27/54

    CPC分类号： G03F7/70425

    摘要： Provided is a wafer exposure apparatus used in a semiconductor device manufacturing process, the exposure apparatus including: a reflective mirror for reflecting light provided from a light source; an optical path changer for changing a path of the light provided from the reflective mirror; first mirrors installed at both sides of the optical path changer to change the path of the light; second mirrors installed at both sides of a material to change the path of the light; and third mirrors installed at both sides of a mask to enter the light reflected by the first mirrors to the mask and to enter the light passed through the mask into the second mirrors, whereby it is possible to continuously expose one surface, both surfaces or a specific surface of a wafer in a state that the wafer is once aligned.

    摘要翻译： 提供了一种在半导体器件制造工艺中使用的晶片曝光装置，该曝光装置包括：用于反射从光源提供的光的反射镜; 用于改变从反射镜提供的光的路径的光路改变器; 首先将镜子安装在光路改换器的两侧，以改变光线的路径; 第二个镜子安装在材料的两侧以改变光线的路径; 和第三反射镜，其安装在掩模的两侧，以将由第一反射镜反射的光进入掩模，并将通过掩模的光进入第二反射镜，由此可以连续地将一个表面，两个表面或一个 在晶片一次对准的状态下晶片的比表面。