公开(公告)号：US07141464B2

公开(公告)日：2006-11-28

申请号：US11179983

申请日：2005-07-12

Applicant: Jong Moon Park ,  Kun Sik Park ,  Seong Wook Yoo ,  Yong Sun Yoon ,  Sang Gi Kim ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Bo Woo Kim

Inventor： Jong Moon Park ,  Kun Sik Park ,  Seong Wook Yoo ,  Yong Sun Yoon ,  Sang Gi Kim ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Bo Woo Kim

IPC: H01L21/338

CPC classification number: H01L21/28587

Abstract: Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible to readily perform a compound semiconductor device manufacturing process, and to reduce manufacturing cost by means of the increase of manufacturing yield and the simplification of manufacturing processes.

Abstract translation: 提供一种制造T型栅极的方法，包括以下步骤：分别在衬底上形成预定厚度的第一光致抗蚀剂层，阻挡层和第二光致抗蚀剂层; 在所述第二光致抗蚀剂层和所述阻挡层上形成T型栅极的主体图案; 暴露第二光致抗蚀剂层的预定部分以形成T型栅极的头部图案，并且进行热处理工艺以在除了T型的头部图案之外的第二光致抗蚀剂层的预定区域处产生交联 门; 在所得结构的整个表面上进行曝光处理，然后去除所述暴露部分; 在所得结构的整个表面上形成预定厚度的金属层，然后去除第一光致抗蚀剂层，阻挡层，产生交联的第二光致抗蚀剂层的预定区域和金属层 ，由此可以容易地进行化合物半导体器件制造工艺，并且通过增加制造成品率和简化制造工艺来降低制造成本。

公开(公告)号：US6159846A

公开(公告)日：2000-12-12

申请号：US936398

申请日：1997-09-29

Applicant: Seong-Wook Yoo

Inventor： Seong-Wook Yoo

IPC: H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L21/44

CPC classification number: H01L21/28525 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The method of metallization in semiconductor devices provides a substrate having a conducting region and having an insulating layer formed on the substrate. The insulating layer has a contact hole which exposes the conducting region. Next, a silicon-containing metallization layer and a silicon-free metallization layer are sequentially formed on the insulating layer such that the silicon-containing metallization layer contacts the conducting region through the contact hole. After heat-treating the substrate, the two metallization layers are patterned.

Abstract translation: 半导体器件中的金属化方法提供了具有导电区域并且在基底上形成有绝缘层的衬底。 绝缘层具有露出导电区域的接触孔。 接下来，在绝缘层上顺序地形成含硅金属化层和无硅金属化层，使得含硅金属化层通过接触孔接触导电区域。 在对基底进行热处理之后，对两个金属化层进行图案化。

公开(公告)号：US20120098057A1

公开(公告)日：2012-04-26

申请号：US13228479

申请日：2011-09-09

Applicant: Sang Gi KIM ,  Jin-Gun Koo ,  Seong Wook Yoo ,  Jong-Moon Park ,  Jin Ho Lee ,  Kyoung Il Na ,  Yil Suk Yang ,  Jongdae Kim

Inventor： Sang Gi KIM ,  Jin-Gun Koo ,  Seong Wook Yoo ,  Jong-Moon Park ,  Jin Ho Lee ,  Kyoung Il Na ,  Yil Suk Yang ,  Jongdae Kim

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/7813 ,  H01L21/2255 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.

Abstract translation: 提供半导体器件及其制造方法。 该方法包括：在第一导电类型的半导体衬底中形成沟槽; 在所述沟槽的侧壁和底表面上形成包含第二导电类型的掺杂剂的沟槽掺杂剂层; 通过将所述沟槽掺杂剂含量层中的掺杂剂扩散到所述半导体衬底中来形成掺杂区域; 并去除含沟槽掺杂剂层。

公开(公告)号：US07170044B2

公开(公告)日：2007-01-30

申请号：US10913398

申请日：2004-08-09

Applicant: Kun Sik Pakr ,  Seong Wook Yoo ,  Jong Moon Park ,  Yong Sun Yoon ,  Sang Gi Kim ,  Bo Woo Kim ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo

Inventor： Kun Sik Pakr ,  Seong Wook Yoo ,  Jong Moon Park ,  Yong Sun Yoon ,  Sang Gi Kim ,  Bo Woo Kim ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo

IPC: H01J40/14

CPC classification number: H01L31/02161 ,  H01L31/02019 ,  H01L31/022408

Abstract: Provided is a photodetector in which a transparent nonconductive material having an interface charge and a trapped charge is deposited on a semiconductor surface so as to form a depletion region on the surface of the semiconductor, and the depletion region is employed as an optical detecting region, thereby not only improving detection with respect to light having a wavelength of ultraviolet and blue ranges but also filtering light having a wavelength of visible and infrared ranges, and in which a fabricating process thereof is compatible with a universal silicon CMOS process.

Abstract translation: 提供了一种光电检测器，其中具有界面电荷和俘获电荷的透明非导电材料沉积在半导体表面上，以在半导体的表面上形成耗尽区，并且耗尽区被用作光学检测区域， 从而不仅能够提高对具有紫外线和蓝色范围的波长的光的检测，而且可以改善具有可见光和红外范围的波长的滤光，并且其制造方法与通用硅CMOS工艺相兼容。

公开(公告)号：US07855366B2

公开(公告)日：2010-12-21

申请号：US12111830

申请日：2008-04-29

Applicant: Kun Sik Park ,  Yong Sun Yoon ,  Bo Woo Kim ,  Jin Yeong Kang ,  Jong Moon Park ,  Seong Wook Yoo

Inventor： Kun Sik Park ,  Yong Sun Yoon ,  Bo Woo Kim ,  Jin Yeong Kang ,  Jong Moon Park ,  Seong Wook Yoo

IPC: G01J5/20

CPC classification number: G01J5/20 ,  H01L21/762 ,  H01L27/1203

Abstract: A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.

Abstract translation: 提供了一种基于BJT（双极结型晶体管）的非制冷IR传感器及其制造方法。 基于BJT的非制冷红外传感器包括：基板; 至少一个BJT，其形成为与衬底分开浮动; 以及形成在所述至少一个BJT的上表面上的吸热层，其中所述BJT根据通过所述吸热层吸收的热量来改变输出值。 因此，可以提供能够通过CMOS兼容工艺实现的BJT系非冷却IR传感器，并获得更优异的温度变化检测特性。

公开(公告)号：US07190432B2

公开(公告)日：2007-03-13

申请号：US11249783

申请日：2005-10-13

Applicant: Sang Gi Kim ,  Ju Wook Lee ,  Jong Moon Park ,  Seong Wook Yoo ,  Kun Sik Park ,  Yong Sun Yoon ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Boo Woo Kim

Inventor： Sang Gi Kim ,  Ju Wook Lee ,  Jong Moon Park ,  Seong Wook Yoo ,  Kun Sik Park ,  Yong Sun Yoon ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Boo Woo Kim

IPC: G03B27/32 ,  G03B27/42 ,  G03B27/70 ,  G03B27/54

CPC classification number: G03F7/70425

Abstract: Provided is a wafer exposure apparatus used in a semiconductor device manufacturing process, the exposure apparatus including: a reflective mirror for reflecting light provided from a light source; an optical path changer for changing a path of the light provided from the reflective mirror; first mirrors installed at both sides of the optical path changer to change the path of the light; second mirrors installed at both sides of a material to change the path of the light; and third mirrors installed at both sides of a mask to enter the light reflected by the first mirrors to the mask and to enter the light passed through the mask into the second mirrors, whereby it is possible to continuously expose one surface, both surfaces or a specific surface of a wafer in a state that the wafer is once aligned.

Abstract translation: 提供了一种在半导体器件制造工艺中使用的晶片曝光装置，该曝光装置包括：用于反射从光源提供的光的反射镜; 用于改变从反射镜提供的光的路径的光路改变器; 首先将镜子安装在光路改换器的两侧，以改变光线的路径; 第二个镜子安装在材料的两侧以改变光线的路径; 和第三反射镜，其安装在掩模的两侧，以将由第一反射镜反射的光进入掩模，并将通过掩模的光进入第二反射镜，由此可以连续地将一个表面，两个表面或一个 在晶片一次对准的状态下晶片的比表面。

公开(公告)号：US20060079030A1

公开(公告)日：2006-04-13

申请号：US11179983

申请日：2005-07-12

Applicant: Jong Moon Park ,  Kun Sik Park ,  Seong Wook Yoo ,  Yong Sun Yoon ,  Sang Gi Kim ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Bo Woo Kim

Inventor： Jong Moon Park ,  Kun Sik Park ,  Seong Wook Yoo ,  Yong Sun Yoon ,  Sang Gi Kim ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Bo Woo Kim

IPC: H01L21/8232 ,  H01L21/338

CPC classification number: H01L21/28587

Abstract: Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible to readily perform a compound semiconductor device manufacturing process, and to reduce manufacturing cost by means of the increase of manufacturing yield and the simplification of manufacturing processes.

公开(公告)号：US08629020B2

公开(公告)日：2014-01-14

申请号：US13228479

申请日：2011-09-09

Applicant: Sang Gi Kim ,  Jin-Gun Koo ,  Seong Wook Yoo ,  Jong-Moon Park ,  Jin Ho Lee ,  Kyoung Il Na ,  Yil Suk Yang ,  Jongdae Kim

Inventor： Sang Gi Kim ,  Jin-Gun Koo ,  Seong Wook Yoo ,  Jong-Moon Park ,  Jin Ho Lee ,  Kyoung Il Na ,  Yil Suk Yang ,  Jongdae Kim

IPC: H01L21/336

CPC classification number: H01L29/7813 ,  H01L21/2255 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.

Abstract translation: 提供半导体器件及其制造方法。 该方法包括：在第一导电类型的半导体衬底中形成沟槽; 在所述沟槽的侧壁和底表面上形成包含第二导电类型的掺杂剂的沟槽掺杂剂层; 通过将所述沟槽掺杂剂含量层中的掺杂剂扩散到所述半导体衬底中来形成掺杂区域; 并去除含沟槽掺杂剂层。

公开(公告)号：US20090321641A1

公开(公告)日：2009-12-31

申请号：US12111830

申请日：2008-04-29

Applicant: Kun Sik PARK ,  Yong Sun YOON ,  Bo Woo KIM ,  Jin Yeong KANG ,  Jong Moon PARK ,  Seong Wook YOO

Inventor： Kun Sik PARK ,  Yong Sun YOON ,  Bo Woo KIM ,  Jin Yeong KANG ,  Jong Moon PARK ,  Seong Wook YOO

IPC: H01L31/024 ,  H01L31/18 ,  H01L31/09

CPC classification number: G01J5/20 ,  H01L21/762 ,  H01L27/1203

Abstract: A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.

Abstract translation: 提供了一种基于BJT（双极结型晶体管）的非制冷IR传感器及其制造方法。 基于BJT的非制冷红外传感器包括：基板; 至少一个BJT，其形成为与衬底分开浮动; 以及形成在所述至少一个BJT的上表面上的吸热层，其中所述BJT根据通过所述吸热层吸收的热量来改变输出值。 因此，可以提供能够通过CMOS兼容工艺实现的BJT系非冷却IR传感器，并获得更优异的温度变化检测特性。

公开(公告)号：US20060109444A1

公开(公告)日：2006-05-25

申请号：US11249783

申请日：2005-10-13

Applicant: Sang Gi Kim ,  Ju Wook Lee ,  Jong Moon Park ,  Seong Wook Yoo ,  Kun Sik Park ,  Yong Sun Yoon ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Boo Woo Kim

Inventor： Sang Gi Kim ,  Ju Wook Lee ,  Jong Moon Park ,  Seong Wook Yoo ,  Kun Sik Park ,  Yong Sun Yoon ,  Yoon Kyu Bae ,  Byung Won Lim ,  Jin Gun Koo ,  Boo Woo Kim

IPC: G03B27/54

CPC classification number: G03F7/70425

Abstract: Provided is a wafer exposure apparatus used in a semiconductor device manufacturing process, the exposure apparatus including: a reflective mirror for reflecting light provided from a light source; an optical path changer for changing a path of the light provided from the reflective mirror; first mirrors installed at both sides of the optical path changer to change the path of the light; second mirrors installed at both sides of a material to change the path of the light; and third mirrors installed at both sides of a mask to enter the light reflected by the first mirrors to the mask and to enter the light passed through the mask into the second mirrors, whereby it is possible to continuously expose one surface, both surfaces or a specific surface of a wafer in a state that the wafer is once aligned.

Abstract translation: 提供了一种在半导体器件制造工艺中使用的晶片曝光装置，该曝光装置包括：用于反射从光源提供的光的反射镜; 用于改变从反射镜提供的光的路径的光路改变器; 首先将镜子安装在光路改换器的两侧，以改变光线的路径; 第二个镜子安装在材料的两侧以改变光线的路径; 和第三反射镜，其安装在掩模的两侧，以将由第一反射镜反射的光进入掩模，并将通过掩模的光进入第二反射镜，由此可以连续地将一个表面，两个表面或一个 在晶片一次对准的状态下晶片的比表面。