PATTERN FORMATION AND TRANSFER DIRECTLY ON SILICON BASED FILMS
    1.
    发明申请
    PATTERN FORMATION AND TRANSFER DIRECTLY ON SILICON BASED FILMS 审中-公开
    图形形成和直接传播基于硅的薄膜

    公开(公告)号:US20150132959A1

    公开(公告)日:2015-05-14

    申请号:US14075971

    申请日:2013-11-08

    Abstract: Embodiments involve patterned mask formation. In one embodiment, a method involves depositing a CVD film over a semiconductor wafer; exposing the CVD film to e-beam or UV radiation, forming a pattern in the CVD film; and etching the pattern in the CVD film, forming features in areas not exposed to the e-beam or UV radiation. In one embodiment, a method involves depositing a CVD film over a semiconductor wafer; depositing a thin photo-sensitive CVD hardmask film over the CVD film; exposing the thin photo-sensitive CVD hardmask film to e-beam or UV radiation, forming a pattern in the thin photo-sensitive CVD hardmask film; etching the pattern in the thin photo-sensitive CVD hardmask film; etching the pattern into the CVD film through the patterned thin photo-sensitive CVD hardmask film; and removing the patterned thin photo-sensitive CVD hardmask film.

    Abstract translation: 实施例涉及图案化掩模形成。 在一个实施例中,一种方法包括在半导体晶片上沉积CVD膜; 将CVD膜暴露于电子束或UV辐射,在CVD膜中形成图案; 并蚀刻CVD膜中的图案,在不暴露于电子束或UV辐射的区域中形成特征。 在一个实施例中,一种方法包括在半导体晶片上沉积CVD膜; 在CVD膜上沉积薄的光敏CVD硬掩模膜; 将薄的光敏CVD硬掩模膜暴露于电子束或UV辐射,在薄的光敏CVD硬掩模膜中形成图案; 蚀刻薄光敏CVD硬掩模膜中的图案; 通过图案化的薄光敏CVD硬掩模膜将图案蚀刻到CVD膜中; 并去除图案化的光敏CVD硬掩模膜。

    PROCESS CHAMBER FOR ETCHING LOW K AND OTHER DIELECTRIC FILMS
    3.
    发明申请
    PROCESS CHAMBER FOR ETCHING LOW K AND OTHER DIELECTRIC FILMS 有权
    用于蚀刻低K和其他电介质膜的工艺室

    公开(公告)号:US20130105303A1

    公开(公告)日:2013-05-02

    申请号:US13651074

    申请日:2012-10-12

    Abstract: Methods and process chambers for etching of low-k and other dielectric films are described. For example, a method includes modifying portions of the low-k dielectric layer with a plasma process. The modified portions of the low-k dielectric layer are etched selectively over a mask layer and unmodified portions of the low-k dielectric layer. Etch chambers having multiple chamber regions for alternately generating distinct plasmas are described. In embodiments, a first charge coupled plasma source is provided to generate an ion flux to a workpiece in one operational mode, while a secondary plasma source is provided to provide reactive species flux without significant ion flux to the workpiece in another operational mode. A controller operates to cycle the operational modes repeatedly over time to remove a desired cumulative amount of the dielectric material.

    Abstract translation: 描述了用于蚀刻低k和其他电介质膜的方法和处理室。 例如,一种方法包括用等离子体处理来修改低k电介质层的部分。 选择性地在低k电介质层的掩模层和低k电介质层的未修改部分上蚀刻低k电介质层的改性部分。 描述了具有用于交替产生不同等离子体的多个室区的蚀刻室。 在实施例中,提供第一电荷耦合等离子体源以在一个操作模式中产生到工件的离子通量,而提供次级等离子体源以在另一个操作模式中提供反应物质通量,而不会对工件产生显着的离子通量。 控制器操作以随着时间重复地循环操作模式以去除期望的累积量的电介质材料。

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