公开(公告)号：US07342265B2

公开(公告)日：2008-03-11

申请号：US11012116

申请日：2004-12-16

申请人： Makoto Kuwahara ,  Yoshiyuki Hattori ,  Shoichi Yamauchi ,  Mikimasa Suzuki

发明人： Makoto Kuwahara ,  Yoshiyuki Hattori ,  Shoichi Yamauchi ,  Mikimasa Suzuki

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7813 ,  G06F17/5068 ,  H01L29/0634

摘要： A semiconductor device is fabricated to include a withstand-voltage assurance layer designed into a multi-dimensional super junction structure and a group of trench gate electrodes, each of which penetrating a body layer in contact with the multi-dimensional super junction structure to reach the multi-dimensional super junction structure, so that dispersions of an on-resistance of the semiconductor device can be reduced. When a position at which the group of trench gate electrodes is created is shifted in one direction, the size of an overlap area common to the group of trench gate electrodes and an n-type column changes. However, the group of trench gate electrodes is oriented in such a way that the changes in overlap-area size are minimized.

摘要翻译： 半导体器件被制造成包括设计成多维超结结构的耐压保证层和一组沟槽栅极电极，每个沟槽栅电极穿透与多维超结结构接触的体层以达到 多维超结结构，能够降低半导体装置的导通电阻的分散。 当形成沟槽栅电极组的位置在一个方向上移动时，沟槽栅电极组和n型列共同的重叠区域的尺寸改变。 然而，沟槽栅电极组被定向成使得重叠区域尺寸的变化最小化。

公开(公告)号：US20050133859A1

公开(公告)日：2005-06-23

申请号：US11012116

申请日：2004-12-16

申请人： Makoto Kuwahara ,  Yoshiyuki Hattori ,  Shoichi Yamauchi ,  Mikimasa Suzuki

发明人： Makoto Kuwahara ,  Yoshiyuki Hattori ,  Shoichi Yamauchi ,  Mikimasa Suzuki

IPC分类号： G06F17/50 ,  H01L27/02 ,  H01L29/06 ,  H01L29/76 ,  H01L29/78

CPC分类号： H01L29/7813 ,  G06F17/5068 ,  H01L29/0634

摘要： A semiconductor device is fabricated to include a withstand-voltage assurance layer designed into a multi-dimensional super junction structure and a group of trench gate electrodes, each of which penetrating a body layer in contact with the multi-dimensional super junction structure to reach the multi-dimensional super junction structure, so that dispersions of an on-resistance of the semiconductor device can be reduced. When a position at which the group of trench gate electrodes is created is shifted in one direction, the size of an overlap area common to the group of trench gate electrodes and an n-type column changes. However, the group of trench gate electrodes is oriented in such a way that the changes in overlap-area size are minimized.

摘要翻译： 半导体器件被制造成包括设计成多维超结结构的耐压保证层和一组沟槽栅极电极，每个沟槽栅电极穿透与多维超结结构接触的体层以达到 多维超结结构，能够降低半导体装置的导通电阻的分散。 当形成沟槽栅电极组的位置在一个方向上移动时，沟槽栅电极组和n型列共同的重叠区域的尺寸改变。 然而，沟槽栅电极组被定向成使得重叠区域尺寸的变化最小化。

公开(公告)号：US20070013412A1

公开(公告)日：2007-01-18

申请号：US11472547

申请日：2006-06-22

申请人： Shoichi Yamauchi ,  Tomoatsu Makino ,  Makoto Kuwahara ,  Yoshiyuki Hattori

发明人： Shoichi Yamauchi ,  Tomoatsu Makino ,  Makoto Kuwahara ,  Yoshiyuki Hattori

IPC分类号： H03K19/091

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41741 ,  H01L29/66734 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a cell region; a terminal region; a lower semiconductor layer; a intermediate semiconductor layer on the lower semiconductor layer including a super junction structure; a terminal upper semiconductor layer on the intermediate semiconductor layer; a terminal contact semiconductor region on a surface portion of the terminal upper semiconductor layer adjacent to the cell region; an insulation layer on the terminal upper semiconductor layer having a first part adjacent to the cell region with a small thickness and a second part adjacent to the first part with a large thickness; and a conductive layer in the cell region and a part of the terminal region, the conductive layer extending from the cell region to the part of the terminal region beyond the first part of the insulation layer.

摘要翻译： 半导体器件包括：单元区域; 终端区域 下半导体层; 包括超级结结构的下半导体层上的中间半导体层; 中间半导体层上的端子上半导体层; 在所述端子上半导体层的与所述单元区域相邻的表面部分上的端子接触半导体区域; 端子上半导体层上的绝缘层具有邻近具有小厚度的单元区域的第一部分和与厚度较大的第一部分相邻的第二部分; 以及在所述单元区域和所述端子区域的一部分中的导电层，所述导电层从所述单元区域延伸到所述绝缘层的所述第一部分之外的所述端子区域的所述部分。

公开(公告)号：US07342422B2

公开(公告)日：2008-03-11

申请号：US11472547

申请日：2006-06-22

申请人： Shoichi Yamauchi ,  Tomoatsu Makino ,  Makoto Kuwahara ,  Yoshiyuki Hattori

发明人： Shoichi Yamauchi ,  Tomoatsu Makino ,  Makoto Kuwahara ,  Yoshiyuki Hattori

IPC分类号： H01L25/00 ,  H03K19/00

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41741 ,  H01L29/66734 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a cell region; a terminal region; a lower semiconductor layer; a intermediate semiconductor layer on the lower semiconductor layer including a super junction structure; a terminal upper semiconductor layer on the intermediate semiconductor layer; a terminal contact semiconductor region on a surface portion of the terminal upper semiconductor layer adjacent to the cell region; an insulation layer on the terminal upper semiconductor layer having a first part adjacent to the cell region with a small thickness and a second part adjacent to the first part with a large thickness; and a conductive layer in the cell region and a part of the terminal region, the conductive layer extending from the cell region to the part of the terminal region beyond the first part of the insulation layer.

摘要翻译： 半导体器件包括：单元区域; 终端区域 下半导体层; 包括超级结结构的下半导体层上的中间半导体层; 中间半导体层上的端子上半导体层; 在所述端子上半导体层的与所述单元区域相邻的表面部分上的端子接触半导体区域; 端子上半导体层上的绝缘层具有邻近具有小厚度的单元区域的第一部分和与厚度较大的第一部分相邻的第二部分; 以及在所述单元区域和所述端子区域的一部分中的导电层，所述导电层从所述单元区域延伸到所述绝缘层的所述第一部分之外的所述端子区域的所述部分。

公开(公告)号：US08022477B2

公开(公告)日：2011-09-20

申请号：US12071411

申请日：2008-02-21

申请人： Nozomu Akagi ,  Shigeki Takahashi ,  Takashi Nakano ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara

发明人： Nozomu Akagi ,  Shigeki Takahashi ,  Takashi Nakano ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara

IPC分类号： H01L29/66

CPC分类号： H01L29/7817 ,  H01L27/0738 ,  H01L29/0696 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/435 ,  H01L29/4933 ,  H01L29/7824 ,  H01L29/7835

摘要： A semiconductor apparatus comprises: a semiconductor substrate; and a lateral type MIS transistor disposed on a surface part of the semiconductor substrate. The lateral type MIS transistor includes: a line coupled with a gate of the lateral type MIS transistor; a polycrystalline silicon resistor that is provided in the line, and that has a conductivity type opposite to a drain of the lateral type MIS transistor; and an insulating layer through which a drain voltage of the lateral type MIS transistor is applied to the polycrystalline silicon resistor.

摘要翻译： 半导体装置包括：半导体衬底; 以及设置在半导体衬底的表面部分上的横向型MIS晶体管。 横向型MIS晶体管包括：与横向型MIS晶体管的栅极耦合的线; 该多晶硅电阻器设置在该线路中，并且具有与横向型MIS晶体管的漏极相反的导电类型; 以及绝缘层，横向型MIS晶体管的漏极电压通过该绝缘层施加到多晶硅电阻器。

公开(公告)号：US07671636B2

公开(公告)日：2010-03-02

申请号：US11723967

申请日：2007-03-22

申请人： Takaaki Aoki ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

发明人： Takaaki Aoki ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

IPC分类号： H03K3/00

CPC分类号： H01L27/0629 ,  H01L27/0255 ,  H03K17/063 ,  H03K17/165 ,  H03K17/168 ,  H03K17/567 ,  H03K17/687 ,  H03K2217/0036

摘要： A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

公开(公告)号：US20080012610A1

公开(公告)日：2008-01-17

申请号：US11723967

申请日：2007-03-22

申请人： Takaaki Aoki ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

发明人： Takaaki Aoki ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

IPC分类号： H03K3/00 ,  H03K17/00

CPC分类号： H01L27/0629 ,  H01L27/0255 ,  H03K17/063 ,  H03K17/165 ,  H03K17/168 ,  H03K17/567 ,  H03K17/687 ,  H03K2217/0036

摘要： A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

摘要翻译： 开关电路包括：具有第一电极，第二电极和控制电极的晶体管; 齐纳二极管; 和电容器。 第一电极和第二电极之间的连接能够通过切换晶体管的控制电压来暂时地在状态和非导通状态之间切换。 齐纳二极管和电容器串联耦合在晶体管的第一电极和控制电极之间。 第一电极是漏极或集电极。

公开(公告)号：US20080054325A1

公开(公告)日：2008-03-06

申请号：US11892819

申请日：2007-08-28

申请人： Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

发明人： Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

IPC分类号： H01L27/06

CPC分类号： H01L27/0727 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7817 ,  H01L29/7821

摘要： A semiconductor device includes: a semiconductor substrate; a lateral MOS transistor disposed in the substrate; a Zener diode disposed in the substrate; and a capacitor disposed in the substrate. The transistor includes a drain and a gate, and the diode and the capacitor are coupled in series between the drain and the gate. This device has minimized dimensions and high switching speed. Further, both of a switching loss and a surge voltage are improved.

摘要翻译： 半导体器件包括：半导体衬底; 设置在基板中的横向MOS晶体管; 设置在基板中的齐纳二极管; 以及设置在基板中的电容器。 晶体管包括漏极和栅极，并且二极管和电容器串联耦合在漏极和栅极之间。 该设备具有最小的尺寸和高切换速度。 此外，改善了开关损耗和浪涌电压两者。

公开(公告)号：US20120182051A1

公开(公告)日：2012-07-19

申请号：US13433624

申请日：2012-03-29

申请人： Takaaki Aoki ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

发明人： Takaaki Aoki ,  Shoji Mizuno ,  Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

IPC分类号： H03K3/00

CPC分类号： H01L27/0629 ,  H01L27/0255 ,  H03K17/063 ,  H03K17/165 ,  H03K17/168 ,  H03K17/567 ,  H03K17/687 ,  H03K2217/0036

摘要： A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a conduction state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

摘要翻译： 开关电路包括：具有第一电极，第二电极和控制电极的晶体管; 齐纳二极管; 和电容器。 通过切换晶体管的控制电压，第一电极和第二电极之间的连接能够在导通状态和非导通状态之间暂时切换。 齐纳二极管和电容器串联耦合在晶体管的第一电极和控制电极之间。 第一电极是漏极或集电极。

公开(公告)号：US20120025874A1

公开(公告)日：2012-02-02

申请号：US13190798

申请日：2011-07-26

申请人： Hirotaka Saikaku ,  Tsuyoshi Yamamoto ,  Shoji Mizuno ,  Masakiyo Sumitomo ,  Tetsuo Fujii ,  Jun Sakakibara ,  Hitoshi Yamaguchi ,  Yoshiyuki Hattori ,  Rie Taguchi ,  Makoto Kuwahara

发明人： Hirotaka Saikaku ,  Tsuyoshi Yamamoto ,  Shoji Mizuno ,  Masakiyo Sumitomo ,  Tetsuo Fujii ,  Jun Sakakibara ,  Hitoshi Yamaguchi ,  Yoshiyuki Hattori ,  Rie Taguchi ,  Makoto Kuwahara

IPC分类号： H03K17/06 ,  H01L29/739

CPC分类号： H01L29/7813 ,  H01L27/0629 ,  H01L27/0635 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4983 ,  H01L29/66734 ,  H01L29/7391 ,  H01L29/7393 ,  H01L29/7397 ,  H01L29/7398 ,  H01L29/7805 ,  H01L29/7819 ,  H01L29/7825 ,  H01L29/7831 ,  H01L29/861 ,  H01L2924/0002 ,  H02M7/003 ,  H01L2924/00

摘要： A semiconductor device includes a switching element having: a drift layer; a base region; an element-side first impurity region in the base region; an element-side gate electrode sandwiched between the first impurity region and the drift layer; a second impurity region contacting the drift layer; an element-side first electrode coupled with the element-side first impurity region and the base region; and an element-side second electrode coupled with the second impurity region, and a FWD having: a first conductive layer; a second conductive layer; a diode-side first electrode coupled to the second conductive layer; a diode-side second electrode coupled to the first conductive layer; a diode-side first impurity region in the second conductive layer; and a diode-side gate electrode in the second conductive layer sandwiched between first impurity region and the first conductive layer and having a first gate electrode as an excess carrier injection suppression gate.

摘要翻译： 一种半导体器件包括：具有漂移层的开关元件; 基地区 在基极区域中的元件侧第一杂质区域; 夹在所述第一杂质区域和所述漂移层之间的元件侧栅电极; 接触漂移层的第二杂质区; 与元件侧第一杂质区域和基极区域耦合的元件侧第一电极; 以及与所述第二杂质区域耦合的元件侧第二电极以及具有：第一导电层的FWD; 第二导电层; 耦合到所述第二导电层的二极管侧第一电极; 耦合到所述第一导电层的二极管侧第二电极; 第二导电层中的二极管侧第一杂质区; 以及夹在第一杂质区域和第一导电层之间的第二导电层中的二极管侧栅电极，并具有作为过剩载流子注入抑制栅极的第一栅极电极。