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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110309359A1

    公开(公告)日：2011-12-22

    申请号：US13148993

    申请日：2009-02-27

    申请人： Makoto Saen ,  Kenichi Osada ,  Kiyoto Ito

    发明人： Makoto Saen ,  Kenichi Osada ,  Kiyoto Ito

    IPC分类号： H01L23/58

    CPC分类号： G01R31/318513 ,  G11C5/04 ,  G11C29/02 ,  G11C29/025 ,  H01L2224/16145 ,  H01L2224/16225

    摘要： In a test method of stacked LSIs connected by Through Silicon Vias, it is difficult to perform a failure diagnosis by using a conventional device test method to only one side of a silicon wafer, there is a possibility of yield degradation at a stacking time of LSIs, and a plurality of LSIs is connected to one Through Silicon Via so that it is necessary to select and remedy a defective Through Silicon Via taking into account all the device states. These problems cannot be solved by conventional test methods. Therefore, for a device test of a Through Silicon Via through a plurality of chips, a circuit that generates a time-series test pattern having both 0 and 1 values for a delay fault test is added to a circuit portion that transmits data to a Through Silicon Via in the stacked LSIs, and a circuit that receives the test pattern and compares the pattern received with a fixed pattern for a match to detect a defect of a Through Silicon Via is added to a circuit portion that receives data from a Through Silicon Via in the stacked LSIs.

    摘要翻译： 在通过硅通孔连接的层叠LSI的测试方法中，仅通过使用传统的器件测试方法仅对硅晶片的一侧进行故障诊断是困难的，因此在LSI的堆叠时间内产生劣化的可能性 ，并且多个LSI连接到一个通硅通孔，使得有必要考虑到所有器件状态来选择和补救有缺陷的Through Silicon Via。 这些问题不能用传统的测试方法来解决。 因此，对于通过多个芯片的通孔硅器件的器件测试，产生用于延迟故障测试的具有0和1值的时间序列测试图案的电路被添加到电路部分，该电路部分将数据发送到通 在层叠的LSI中的硅通孔，以及接收测试图案并将接收的模式与用于匹配的固定模式进行比较以检测通硅通孔的缺陷的电路被添加到从直通硅通道接收数据的电路部分 在堆叠的LSI中。

    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08242589B2

    公开(公告)日：2012-08-14

    申请号：US13148993

    申请日：2009-02-27

    申请人： Makoto Saen ,  Kenichi Osada ,  Kiyoto Ito

    发明人： Makoto Saen ,  Kenichi Osada ,  Kiyoto Ito

    IPC分类号： H01L23/02

    CPC分类号： G01R31/318513 ,  G11C5/04 ,  G11C29/02 ,  G11C29/025 ,  H01L2224/16145 ,  H01L2224/16225

    摘要： In a test method of stacked LSIs connected by Through Silicon Vias, it is difficult to perform a failure diagnosis by using a conventional device test method to only one side of a silicon wafer, there is a possibility of yield degradation at a stacking time of LSIs, and a plurality of LSIs is connected to one Through Silicon Via so that it is necessary to select and remedy a defective Through Silicon Via taking into account all the device states. These problems cannot be solved by conventional test methods. Therefore, for a device test of a Through Silicon Via through a plurality of chips, a circuit that generates a time-series test pattern having both 0 and 1 values for a delay fault test is added to a circuit portion that transmits data to a Through Silicon Via in the stacked LSIs, and a circuit that receives the test pattern and compares the pattern received with a fixed pattern for a match to detect a defect of a Through Silicon Via is added to a circuit portion that receives data from a Through Silicon Via in the stacked LSIs.

    摘要翻译： 在通过硅通孔连接的层叠LSI的测试方法中，仅通过使用传统的器件测试方法仅对硅晶片的一侧进行故障诊断是困难的，因此在LSI的堆叠时间内产生劣化的可能性 ，并且多个LSI连接到一个通硅通孔，使得有必要考虑到所有器件状态来选择和补救有缺陷的Through Silicon Via。 这些问题不能用传统的测试方法来解决。 因此，对于通过多个芯片的通孔硅器件的器件测试，产生用于延迟故障测试的具有0和1值的时间序列测试图案的电路被添加到电路部分，该电路部分将数据发送到通 在层叠的LSI中的硅通孔，以及接收测试图案并将接收的模式与用于匹配的固定模式进行比较以检测通硅通孔的缺陷的电路被添加到从直通硅通道接收数据的电路部分 在堆叠的LSI中。

    Manipulator device
    5.
    发明授权
    Manipulator device 有权
    机械手装置

    公开(公告)号：US09144908B2

    公开(公告)日：2015-09-29

    申请号：US14114208

    申请日：2012-04-18

    申请人： Makoto Saen ,  Kiyoto Ito ,  Yoshimitsu Yanagawa ,  Tomomi Takahashi

    发明人： Makoto Saen ,  Kiyoto Ito ,  Yoshimitsu Yanagawa ,  Tomomi Takahashi

    IPC分类号： B25J15/00 ,  B25J19/00 ,  B25J15/08 ,  B25J15/02 ,  B25J13/08 ,  G01L5/22 ,  B25J9/16 ,  G01L5/00

    CPC分类号： B25J15/0253 ,  B25J9/1612 ,  B25J13/083 ,  B25J13/085 ,  G01L5/009 ,  G01L5/228 ,  Y10S901/32 ,  Y10S901/34 ,  Y10S901/47

    摘要： A manipulator device has an arm portion and a hand portion The hand portion includes one or more finger portions that manipulate a target object. Each finger portion includes a slip sensor and multiple contact sensors, with at least one contact sensor at a position proximate to the slip sensor and at least another contact sensor at a position remote from the slip sensor. When the contact sensors at the positions remote from the slip sensor detect contact of the target object and the contact sensors arranged at the positions proximate to the slip sensors do not detect contact, a position of the finger portion is moved by a distance corresponding to the distance between the contact sensors detecting contact of the target object and the contact sensors arranged at the positions proximate to the slip such that a detecting position of the slip sensor is coincident with a position of the target object.

    摘要翻译： 操纵器装置具有臂部和手部。手部包括操纵目标物体的一个或多个手指部。 每个手指部分包括滑动传感器和多个接触传感器，其中至少一个接触传感器位于靠近滑动传感器的位置处，并且至少另一个接触传感器位于远离滑移传感器的位置。 当远离滑动传感器的位置处的接触传感器检测到目标物体的接触点和布置在靠近滑动传感器的位置处的接触传感器没有检测到接触时，手指部分的位置移动相应于 接触传感器之间的距离检测目标物体的接触点和布置在接近滑动位置的接触传感器之间的距离，使得滑动传感器的检测位置与目标物体的位置一致。

    Human-Operated Working Machine System
    8.
    发明申请
    Human-Operated Working Machine System 审中-公开
    人机工作机系统

    公开(公告)号：US20130079905A1

    公开(公告)日：2013-03-28

    申请号：US13701391

    申请日：2010-06-03

    申请人： Makoto Saen ,  Kiyoto Ito

    发明人： Makoto Saen ,  Kiyoto Ito

    IPC分类号： G05B15/02

    CPC分类号： G05B15/02 ,  B25J9/1671 ,  B25J9/1689 ,  G05B2219/35464 ,  G05B2219/40168 ,  G05B2219/40625

    摘要： In a human-operated working machine system made up of a working machine including an actuator and an operating device, various operations for target objects having various hardnesses and shapes are achieved at a speed not giving stress to an operator. To this end, the working machine has a control structure in which a control program corresponding to an action content is executed with both of displacement information with respect to the working machine inputted from the operating device and information from a sensor of the working machine being taken as inputs. Furthermore, the operating device has a simulator that predicts an action of the working machine so as to quickly provide image information and tactile information regarding the action of the working machine to the operator.

    摘要翻译： 在由包括致动器和操作装置的作业机构构成的人造作业机械系统中，以对操作者不施加压力的速度实现具有各种硬度和形状的目标物体的各种操作。 为此，作业机械具有控制结构，在该控制结构中，对与动作内容相对应的控制程序，相对于从操作装置输入的作业机械的位移信息和来自作业机械的传感器的信息 作为输入。 此外，操作装置具有预测作业机械的作用的模拟器，以便快速地向操作者提供关于作业机械的动作的图像信息和触觉信息。

    Semiconductor apparatus
    9.
    发明授权
    Semiconductor apparatus 有权
    半导体装置

    公开(公告)号：US08508968B2

    公开(公告)日：2013-08-13

    申请号：US13461848

    申请日：2012-05-02

    申请人： Makoto Saen ,  Kenichi Osada ,  Masanao Yamaoka ,  Tomonori Sekiguchi

    发明人： Makoto Saen ,  Kenichi Osada ,  Masanao Yamaoka ,  Tomonori Sekiguchi

    IPC分类号： G11C5/06 ,  G11C7/00 ,  H01L23/48 ,  H01L23/52

    CPC分类号： H01L25/0657 ,  G11C5/02 ,  H01L25/18 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

    摘要： The need for mediation operation is eliminated by adoption of a connection topology in which a circuit for executing one transmission (TR—00T), and a circuit for executing a plurality of receptions (TR—10R, TR—20R, TR—30R) are connected to one penetration-electrode group (for example, TSVGL—0). In order to implement the connection topology even in the case of piling up a plurality of LSIs one after another, in particular, a programmable memory element for designating respective penetration-electrode ports for use in transmit, or for us in receive, and address allocation of the respective penetration-electrode ports is mounted in stacked LSIs.

    摘要翻译： 通过采用其中执行一次发送的电路（TR-00T）和用于执行多个接收（TR-10R，TR-20R，TR-30R）的电路的连接拓扑结构来消除对中介操作的需要 连接到一个穿透电极组（例如，TSVGL-0）。 为了实现连接拓扑，即使在堆叠多个LSI的情况下，尤其是用于指定用于发送的各个穿透电极端口或用于接收的可编程存储器元件，以及地址分配 各个贯通电极端口安装在堆叠的LSI中。

    Semiconductor integrated circuit device
    10.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号：US07899643B2

    公开(公告)日：2011-03-01

    申请号：US11935790

    申请日：2007-11-06

    申请人： Makoto Saen ,  Kenichi Osada ,  Tetsuya Yamada ,  Yusuke Kanno ,  Satoshi Misaka

    发明人： Makoto Saen ,  Kenichi Osada ,  Tetsuya Yamada ,  Yusuke Kanno ,  Satoshi Misaka

    IPC分类号： G01K1/12 ,  G06F19/00

    CPC分类号： G06F1/3228 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor integrated circuit device which consumes less power and enables real-time processing. The semiconductor integrated circuit device includes thermal sensors which detect temperature and determine whether the detection result exceeds reference values and output the result, and a control block capable of controlling the operations of arithmetic blocks based on the output signals of the thermal sensors. The control block returns to an operation state from a suspended state with an interrupt signal based on the output signals of the thermal sensors and determines the operation conditions of the arithmetic blocks to ensure that the temperature conditions of the arithmetic blocks are satisfied. Thereby, power consumption is reduced and real-time processing efficiency is improved.

    摘要翻译： 一种半导体集成电路器件，其消耗较少功率并实现实时处理。 半导体集成电路装置包括检测温度并确定检测结果是否超过参考值并输出结果的热传感器，以及能够基于热传感器的输出信号来控制运算块的操作的控制块。 控制块基于热传感器的输出信号从具有中断信号的挂起状态返回到操作状态，并且确定运算块的操作条件，以确保运算块的温度条件得到满足。 从而降低了功耗，提高了实时处理效率。